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參數(shù)資料
| 型號： | SN54F38 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Quadruple 2-Input Positive-Nand Gates(四2輸入正與非門) |
| 中文描述： | 四2輸入正和非門（四2輸入正與非門） |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 94K |
| 代理商： | SN54F38 |
SN54F38, SN74F38
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDFS013A – MARCH 1987 – REVISED OCTOBER 1993
Copyright
1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These devices contain four independent 2-input
NAND buffer gates with open-collector outputs.
They perform the Boolean functions Y = A
B or
Y = A + B in positive logic.
The open-collector outputs require pullup
resistors to perform correctly. They may be
connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
often used to generate higher V
OH
levels.
The SN54F38 is characterized for operation over
the full military temperature range of –55
°
C to
125
°
C. The SN74F38 is characterized for
operation from 0
°
C to 70
°
C.
FUNCTION TABLE
(each gate)
INPUTS
A
OUTPUT
Y
B
H
H
L
L
X
H
X
L
H
logic symbol
logic diagram (positive logic)
1
1A
2
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
&
1Y
3
2Y
6
3Y
8
4Y
11
1Y
3
1
1A
2
1B
2Y
6
4
2A
5
2B
3Y
8
9
3A
10
3B
4Y
11
12
4A
13
4B
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54F38 . . . J PACKAGE
SN74F38 . . . D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
SN54F38 . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1
1
N
3
3
V
4
2
G
N
C
NC – No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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