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| 型號(hào)： | SN54BCT646JT |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| 中文描述： | 八路總線收發(fā)器和寄存器具有三態(tài)輸出 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 130K |
| 代理商： | SN54BCT646JT |
SN54BCT646 . . . JT OR W PACKAGE
SN74BCT646 . . . DW OR NT PACKAGE
(TOP VIEW)
5
6
7
8
9
10
11
25
24
23
22
21
20
19
4
3
2
1 28
12 13 14 15 16
OE
B1
B2
NC
B3
B4
B5
A1
A2
A3
NC
A4
A5
A6
SN54BCT646 . . . FK PACKAGE
(TOP VIEW)
D
S
C
B
B
A
G
N
N
C
S
V
A
B
17 18
27 26
NC – No internal connection
CLKAB
SAB
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
CLKBA
SBA
OE
B1
B2
B3
B4
B5
B6
B7
B8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
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13
SN54BCT646, SN74BCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS037C – AUGUST 1989 – REVISED NOVEMBER 1993
Copyright
1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Bus Transceivers/Registers
Independent Registers and Enables for
A and B Buses
Multiplexed Real-Time and Stored Data
Power-Up High-Impedance Mode
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic and Ceramic 300-mil DIPs (JT, NT)
description
These devices consist of bus transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
input bus or from the internal registers. Data on the
A or B bus is clocked into the registers on the
low-to-high transition of the appropriate clock
(CLKAB or CLKBA) input. Figure 1 illustrates the
four fundamental bus-management functions that
can be performed with the
′
BCT646.
Output-enable (OE) and direction-control (DIR)
inputs are provided to control the transceiver
functions. In the transceiver mode, data present at
the high-impedance port may be stored in either
register or in both.
The select-control (SAB and SBA) inputs can
multiplex stored and real-time (transparent mode)
data. The direction control (DIR) determines which bus will receive data when OE is low. In the isolation mode
(OE high), A data may be stored in one register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit
data. Only one of the two buses, A or B, may be driven at a time.
The SN54BCT646 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74BCT646 is characterized for operation from 0
°
C to 70
°
C.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54BCT646W | OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN54BCT646FK | OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN54BCT648 | Octal Bus Transceivers/Registers With 3-State Outputs(八總線收發(fā)器/寄存器(三態(tài)輸出)) |
| SN54BCT652FK | OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN54BCT652JT | 22-V Supply, 10+1 Channel Gamma Correction Buffer 28-HTSSOP -25 to 85 |
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