
SN54ALS576B, SN54AS576
SN74ALS576B, SN74ALS577A, SN74AS576
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3-State Buffer-Type Inverting Outputs Drive
Bus Lines Directly
Bus-Structured Pinout
Buffered Control Inputs
SN74ALS577A Has Synchronous Clear
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J) 300-mil DIPs, and Ceramic
Flat (W) Packages
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing
buffer
bidirectional bus drivers, and working registers.
registers,
I/O
ports,
These flip-flops enter data on the low-to-high
transition of the clock (CLK) input.
The output-enable (OE) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are disabled.
The SN54ALS576B and SN54AS576 are
characterized for operation over the full military
temperature range of –55
°
C to 125
°
C. The
SN74ALS576B,
SN74ALS577A,
SN74AS576 are characterized for operation from
0
°
C to 70
°
C.
and
SN54ALS576B, SN54AS576 . . . J OR W PACKAGE
SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE
(TOP VIEW)
SN54ALS576B, SN54AS576 . . . FK PACKAGE
(TOP VIEW)
SN74ALS577A . . . DW OR NT PACKAGE
(TOP VIEW)
NC – No internal connection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
2
1
O
8
7
1
8
G
C
V
C
CLR
OE
1D
2D
3D
4D
5D
6D
7D
8D
NC
GND
V
CC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.