參數(shù)資料
型號(hào): SN54AHCT367
廠商: Texas Instruments, Inc.
英文描述: HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
中文描述: 六角緩沖器和線路驅(qū)動(dòng)器,三態(tài)輸出
文件頁(yè)數(shù): 1/13頁(yè)
文件大?。?/td> 398K
代理商: SN54AHCT367
SN54AHCT367, SN74AHCT367
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS418G – JUNE 1998 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Inputs Are TTL-Voltage Compatible
True Outputs
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description/ordering information
The ’AHCT367 devices are designed specifically
to improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
These devices are organized as dual 4-line
and
2-line
buffers/drivers
output-enable (1OE and 2OE) inputs. When OE is
low, the device passes noninverted data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
with
active-low
To ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHCT367N
SN74AHCT367N
SOIC – D
Tube
SN74AHCT367D
AHCT367
Tape and reel
SN74AHCT367DR
–40
°
C to 85
°
C
SOP – NS
Tape and reel
SN74AHCT367NSR
AHCT367
SSOP – DB
Tape and reel
SN74AHCT367DBR
HB367
TSSOP – PW
Tube
SN74AHCT367PW
HB367
Tape and reel
SN74AHCT367PWR
TVSOP – DGV
Tape and reel
SN74AHCT367DGVR
HB367
CDIP – J
Tube
SNJ54AHCT367J
SNJ54AHCT367J
–55
°
C to 125
°
C
CFP – W
Tube
SNJ54AHCT367W
SNJ54AHCT367W
LCCC – FK
Tube
SNJ54AHCT367FK
SNJ54AHCT367FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2A2
2Y2
NC
2A1
2Y1
1Y1
1A2
NC
1Y2
1A3
1
1
N
1
1
V
2
1
G
N
SN54AHCT367 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1OE
1A1
1Y1
1A2
1Y2
1A3
1Y3
GND
V
CC
2OE
2A2
2Y2
2A1
2Y1
1A4
1Y4
SN54AHCT367 . . . J OR W PACKAGE
SN74AHCT367 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
Copyright
2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
相關(guān)PDF資料
PDF描述
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