參數(shù)資料
型號: SN54AHCT16373
廠商: Texas Instruments, Inc.
英文描述: 16-Bit D-type Transparent Latches With 3-State Outputs(16位D鎖存器(三態(tài)輸出))
中文描述: 16位D型透明鎖存器與三態(tài)輸出(16位?鎖存器(三態(tài)輸出))
文件頁數(shù): 1/6頁
文件大?。?/td> 135K
代理商: SN54AHCT16373
SN54AHCT16373, SN74AHCT16373
16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS336C – MARCH 1996 – REVISED JUNE 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
Inputs Are TTL-Voltage Compatible
EPIC
(Enhanced-Performance Implanted
CMOS) Process
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The ’AHCT16373 are 16-bit transparent D-type
latches with 3-state outputs designed specifically
for driving highly capacitive or relatively
low-impedance loads. They are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
These devices can be used as two 8-bit latches or
one 16-bit latch. When the latch-enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When LE is taken low, the Q outputs are latched
at the levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54AHCT16373 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74AHCT16373 is characterized for operation from –40
°
C to 85
°
C.
P
Copyright
1997, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
SN54AHCT16373 . . . WD PACKAGE
SN74AHCT16373 . . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Q1
1Q2
GND
1Q3
1Q4
V
CC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
V
CC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1LE
1D1
1D2
GND
1D3
1D4
V
CC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
V
CC
2D5
2D6
GND
2D7
2D8
2LE
相關(guān)PDF資料
PDF描述
SN54AHCT16374WD 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AHCT16374DGG 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74AHCT16374DGV 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AHCT16374 16-Bit Edge-Triggered D-type Flip-Flops With 3-State Outputs(16位D觸發(fā)器(三態(tài)輸出))
SN54AHCT163 4-Bit Synchronous Binary Counters(4位二進制同步計數(shù)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN54AHCT16373_06 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54AHCT16373_08 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54AHCT16373WD 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54AHCT16374 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AHCT16374_08 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS