
SN54AHCT139, SN74AHCT139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS267D – DECEMBER 1995 – REVISED NOVEMBER 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Inputs Are TTL-Voltage Compatible
EPIC
(Enhanced-Performance Implanted
CMOS) Process
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
The ’AHCT139 are dual 2-line to 4-line decoders/
demultiplexers designed for 4.5-V to 5.5-V V
CC
operation. These devices are designed to be used
in high-performance memory-decoding or data-
routing
applications
propagation delay times. In high-performance
memory systems, these decoders can be used to
minimize the effects of system decoding. When
used with high-speed memories utilizing a fast
enable circuit, the delay times of these decoders
and the enable time of the memory are usually
less than the typical access time of the memory.
This means that the effective system delay
introduced by the decoders is negligible.
requiring
very
short
The active-low enable (G) input can be used as a data line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its
driving circuit.
The SN54AHCT139 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74AHCT139 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
INPUTS
OUTPUTS
G
SELECT
B
A
Y0
Y1
Y2
Y3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
L
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2A
2B
NC
2Y0
2Y1
1B
1Y0
NC
1Y1
1Y2
1
1
N
2
2
V
2
1
G
N
SN54AHCT139 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
SN54AHCT139 . . . J OR W PACKAGE
SN74AHCT139 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright
1996, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
P