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參數(shù)資料
| 型號： | SN54AHC373J |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| 中文描述： | 有三態(tài)輸出的8個透明D型鎖存器 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 575K |
| 代理商： | SN54AHC373J |
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Operating Range 2-V to 5.5-V V
CC
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC373 . . . J OR W PACKAGE
SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC373 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
1
1
O
5
5
8
4
G
L
V
C
8D
7D
7Q
6Q
6D
description/ordering information
The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V V
CC
operation.
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC373N
SN74AHC373N
SOIC – DW
Tube
SN74AHC373DW
AHC373
Tape and reel
SN74AHC373DWR
–40
°
C to 85
°
C
SOP – NS
Tape and reel
SN74AHC373NSR
AHC373
SSOP – DB
Tape and reel
SN74AHC373DBR
HA373
TSSOP – PW
Tube
SN74AHC373PW
HA373
Tape and reel
SN74AHC373PWR
TVSOP – DGV
Tape and reel
SN74AHC373DGVR
HA373
CDIP – J
Tube
SNJ54AHC373J
SNJ54AHC373J
–55
°
C to 125
°
C
CFP – W
Tube
SNJ54AHC373W
SNJ54AHC373W
LCCC – FK
Tube
SNJ54AHC373FK
SNJ54AHC373FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54AHC373W | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN74AHC373DB | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN74AHC373DGV | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54AHC374FK | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN74AHC374DGV | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54AHC373W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54AHC374 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AHC374_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AHC374_08 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54AHC374FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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