參數(shù)資料
型號(hào)： SN54AHC126J
廠商： Texas Instruments, Inc.
英文描述： CAP CERAMIC 4.7UF 10V X5R 0805
中文描述： 翻兩番總線緩沖器門(mén)，三態(tài)輸出
文件頁(yè)數(shù)： 1/18頁(yè)
文件大?。?/td> 571K
代理商： SN54AHC126J
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Operating Range 2-V to 5.5-V V
CC
Latch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information
The ’AHC126 devices are quadruple bus buffer
gates featuring independent line drivers with
3-state outputs. Each output is disabled when the
associated output-enable (OE) input is low. When
OE is high, the respective gate passes the data
from the A input to its Y output.
To ensure the high-impedance state during power
up or power down, OE should be tied to GND
through a pulldown resistor; the minimum value of
the resistor is determined by the current-sourcing
capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC126N
SN74AHC126N
SOIC – D
Tube
SN74AHC126D
AHC126
Tape and reel
SN74AHC126DR
–40
°
C to 85
°
C
SOP – NS
Tape and reel
SN74AHC126NSR
AHC126
SSOP – DB
Tape and reel
SN74AHC126DBR
HA126
TSSOP – PW
Tube
SN74AHC126PW
HA126
Tape and reel
SN74AHC126PWR
TVSOP – DGV
Tape and reel
SN74AHC126DGVR
HA126
CDIP – J
Tube
SNJ54AHC126J
SNJ54AHC126J
–55
°
C to 125
°
C
CFP – W
Tube
SNJ54AHC126W
SNJ54AHC126W
LCCC – FK
Tube
SNJ54AHC126FK
SNJ54AHC126FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AHC126 . . . J OR W PACKAGE
SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC126 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
V
CC
4OE
4A
4Y
3OE
3A
3Y
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1
1
N
3
3
V
4
2
G
N
NC – No internal connection
相關(guān)PDF資料
PDF描述
SN54AHC126FK QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54AHC126W QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN74AHC126DGV Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 8200pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R (BX); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Sn60 Coated; Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate
SN74AHC157DGV CAP 150UF 2.5V SPEC POLYMER SMD
SN54AHC157J QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN54AHC126W 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
SN54AHC132 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHC132_07 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHC132_08 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHC132_09 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
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