參數(shù)資料
型號(hào)： SN54ACT8999
廠商： Texas Instruments, Inc.
英文描述： Scan-Path Selectors With 8-Bit Biderectional Data Buses(掃描路徑選擇器帶8位雙向數(shù)據(jù)線)
中文描述： 掃描路徑選擇器帶有8位Biderectional數(shù)據(jù)總線（掃描路徑選擇器帶8位雙向數(shù)據(jù)線）
文件頁(yè)數(shù)： 1/27頁(yè)
文件大小： 574K
代理商： SN54ACT8999
SN54ACT8999, SN74ACT8999
SCAN-PATH SELECTORS WITH 8-BIT BIDIRECTIONAL DATA BUSES
SCAN-CONTROLLED IEEE STD 1149.1 (JTAG) TAP MULTIPLEXERS
SCAS158D – JUNE 1990 – REVISED DECEMBER 1996
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POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of theTexas Instruments
SCOPE
Family of Testability Products
Compatible With the IEEE Standard 1149.1
(JTAG) Serial Test Bus
Allow Partitioning of System Scan Paths
Can Be Cascaded Horizontally or Vertically
Select One of Four Secondary Scan Paths
to Be Included in a Primary Scan Path
Provide Communication Between Primary
and Remote Test Bus Controllers
Include 8-Bit Programmable Binary Counter
to Count or Initiate Interrupt Signals
Include 8-Bit Identification Bus for Scan
Path Identification
Inputs Are TTL Compatible
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
description
The ’ACT8999 are members of the Texas
Instruments SCOPE
testability integrated-
circuit family. This family of components facilitates
testing of complex circuit-board assemblies.
The ’ACT8999 enhance the scan capability of TI’s
SCOPE
family by allowing augmentation of a
system’s primary scan path with secondary scan
paths (SSPs), which can be individually selected
by the ’ACT8999 for inclusion in the primary scan
path. The device also provides buffering of test
signals to reduce the need for external logic.
By loading the proper values into the instruction register and data registers, the user can select one of four
secondary scan paths. This has the effect of shortening the scan path to allow maximum test throughput when
an individual subsystem (board or box) is to be tested. Any of the device’s six data registers or the instruction
register can be placed in the device’s scan path, i.e., placed between test data input (TDI) and test data output
(TDO) for subsequent shift and scan operations.
All operations of the device except counting are synchronous to the test clock (TCK). The 8-bit programmable
up/down counter can be used to count transitions on the device condition input (DCI) and output interrupt signals
via the device condition output (DCO). The device can be configured to count on either the rising or falling edge
of DCI.
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DTDI
OTMS
DCO
MCO
DTDO
DTCK
GND
DTMS1
DTMS2
DTMS3
DTMS4
DTRST
TDO
TMS
DCI
MCI
ID1
ID2
ID3
ID4
ID5
V
CC
ID6
ID7
ID8
TRST
TDI
TCK
SN54ACT8999 . . . JT PACKAGE
SN74ACT8999 . . . DW OR NT PACKAGE
(TOP VIEW)
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ID8
TRST
TDI
TCK
TMS
TDO
DTRST
ID1
MCI
DCI
DTDI
OTMS
DCO
MCO
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SN54ACT8999 . . . FK PACKAGE
(TOP VIEW)
Copyright
1996, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SCOPE and EPIC are trademarks of Texas Instruments Incorporated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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