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參數(shù)資料
| 型號： | SN54ABT828 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| 中文描述： | 10位緩沖器/驅(qū)動器與3態(tài)輸出（10位緩沖器/驅(qū)動器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 138K |
| 代理商： | SN54ABT828 |
SN54ABT828 . . . JT PACKAGE
SN74ABT828 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
SN54ABT828 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
V
CC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
3 2 1 28 27
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Y3
Y4
Y5
NC
Y6
Y7
Y8
A3
A4
A5
NC
A6
A7
A8
4
26
14 15 16 1718
A
A
G
N
O
Y
Y
A
A
O
N
Y
Y
V
C
NC – No internal connection
SN54ABT828, SN74ABT828
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS194 – FEBRUARY 1991 – REVISED OCTOBER 1992
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1992, Texas Instruments Incorporated
2–1
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Flow-Through Architecture Optimizes
PCB Layout
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25
°
C
High-Drive Outputs (–32-mA I
OH
,
64-mA I
OL
)
Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
description
These 10-bit buffers and bus drivers provide a
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all ten outputs are in
the high-impedance state. The
′
ABT828 provides
inverting data at its outputs.
To ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking
capability of the driver.
The SN74ABT828 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT828 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74ABT828 is characterized for operation from –40
°
C to 85
°
C.
EPIC-
ΙΙ
B is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74ABT828 | 10-Bit Buffers/Drivers With 3-State Outputs(10位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN54ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
| SN74ABT834 | 8-Bit To 9-Bit Parity Bus Transceivers(8-9奇偶總線收發(fā)器) |
| SN54ABT8373 | Scan Test Devices With Octal D-Type Latches(掃描測試裝置(帶八D鎖存器)) |
| SN74ABT8373 | Scan Test Devices With Octal D-Type Latches(掃描測試裝置(帶八D鎖存器)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT833 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS |
| SN54ABT833FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS |
| SN54ABT833JT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS |
| SN54ABT841 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT841FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
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