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參數(shù)資料
| 型號(hào)： | SN54ABT7820GB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 512 】 18 】 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY |
| 中文描述： | 512】18】2選通雙向先入先出存儲(chǔ)器 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 199K |
| 代理商： | SN54ABT7820GB |
SN54ABT7820
512
×
18
×
2
STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SGBS303E – AUGUST 1994 – REVISED APRIL 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
Advanced BiCMOS Technology
Released as DSCC SMD (Standard
Microcircuit Drawing) 5962-9650901QXA
Independent Asynchronous Inputs and
Outputs
Two Separate 512
×
18 FIFOs Buffering
Data in Opposite Directions
Programmable Almost-Full/Almost-Empty
Flag
Empty, Full, and Half-Full Flags
Fast Access Times of 12 ns With a 50-pF
Load and Simultaneous Switching Data
Outputs
Packaged in 84-Pin Ceramic Pin Grid
Array
GB PACKAGE
(TOP VIEW)
A
B
C
D
E
F
G
H
J
K
L
1
2
3
4
5
6
7
8
9
10
11
description
A FIFO memory is a storage device that allows data to be written into and read from its array at independent
data rates. The SN54ABT7820 is arranged as two 512
×
18-bit FIFOs for high speed and fast access times.
It processes data at rates up to 40 MHz, with access times of 18 ns in a bit-parallel format.
The SN54ABT7820 consists of bus transceiver circuits, two 512
×
18 FIFOs, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable inputs
GAB and GBA control the transceiver functions. The SAB and SBA control inputs select whether real-time or
stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs
in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the eight
fundamental bus-management functions that can be performed with the SN54ABT7820.
The SN54ABT7820 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
Copyright
1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Widebus is a trademark of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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| SN54ABT8245FK | SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT8245JT | SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
| SN54ABT827FK | 10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN54ABT827JT | 10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN74ABT827DB | 10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT821 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821JT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT821W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54ABT823 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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