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參數(shù)資料
| 型號： | SN54ABT377J |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE |
| 中文描述： | 八路邊沿觸發(fā)的D型倒裝與時鐘使觸發(fā)器 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 464K |
| 代理商： | SN54ABT377J |
SN54ABT377, SN74ABT377
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLOCK ENABLE
SCBS156B – FEBRUARY 1991 – REVISED JULY 1994
Copyright
1994, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25
°
C
High-Drive Outputs (–32-mA I
OH
,
64-mA I
OL
)
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic
Chip Carriers (FK), and Plastic (N) and
Ceramic (J) DIPs
description
The
′
ABT377 are 8-bit positive-edge-triggered
D-type flip-flops with a clock (CLK) input. They are
particularly suitable for implementing buffer and
storage registers, shift registers, and pattern
generators.
Data (D) input information that meets the setup
time requirements is transferred to the Q outputs
on the positive-going edge of the clock pulse if the
common clock-enable (CLKEN) input is low. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the buffered clock
(CLK) input is at either the high or low level, the
D input signal has no effect at the output. The
circuits are designed to prevent false clocking by
transitions at CLKEN.
The SN74ABT377 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT377 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74ABT377 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
CLKEN
H
CLK
X
↑
↑
H or L
D
X
Q0
H
L
H
L
L
L
X
X
Q0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
CLKEN
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
SN54ABT377 . . . J PACKAGE
SN74ABT377 . . . DB, DW, OR N PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
2D
2Q
3Q
3D
4D
SN54ABT377 . . . FK PACKAGE
(TOP VIEW)
1
1
C
5
5
8
4
G
C
V
C
8D
7D
7Q
6Q
6D
EPIC-
ΙΙ
B is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54ABT377W | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE |
| SN54ABT540FK | OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN74ABT540PW | CABLE ASSEMBLY; SMB PLUG RIGHT ANGLE TO ; SMB JACK BULKHEAD; 50 OHM, RG188A/U COAX; |
| SN54ABT540J | OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN54ABT540W | OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT377W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE |
| SN54ABT533 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT533FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT533J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT534 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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