參數(shù)資料
型號(hào)： SN54ABT18502HVR
廠商： TEXAS INSTRUMENTS INC
元件分類： 總線收發(fā)器
英文描述： ABT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68
封裝： CERAMIC, QFP-68
文件頁(yè)數(shù)： 12/30頁(yè)
文件大?。?/td> 451K
代理商： SN54ABT18502HVR
SN54ABT18502, SN74ABT18502
SCAN TEST DEVICES WITH
18-BIT REGISTERED BUS TRANSCEIVERS
SCBS109B – AUGUST 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2
18 19
48
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36
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34
33
20
1
2
3
4
5
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7
8
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16
21 22 23 24
63 62 61 60 59
64
58
56 55 54
57
25 26 27 28 29
53 52
17
51 50 49
30 31 32
1OEAB
GND
1CLKAB
TDO
1A2
1A1
1LEAB
V
1LEBA
1OEBA
1B1
1B2
TMS
1CLKBA
GND
1B3
2A9
GND
2LEAB
2CLKAB
2A7
2A8
2OEAB
TDI
2CLKBA
2LEBA
2OEBA
2B9
V
TCK
GND
2B8
1A3
1A4
1A5
GND
1A6
1A7
1A8
1A9
VCC
2A1
2A2
2A3
GND
2A4
2A5
2A6
1B4
1B5
1B6
GND
1B7
1B8
1B9
VCC
2B1
2B2
2B3
2B4
GND
2B5
2B6
2B7
CC
SN74ABT18502 ...PM PACKAGE
(TOP VIEW)
description
The SN54ABT18502 and SN74ABT18502 scan test devices with 18-bit universal bus transceivers are
members of the Texas Instruments SCOPE
testability IC family. This family of devices supports IEEE Standard
1149.1-1990 boundary scan to facilitate testing of complex circuit board assemblies. Scan access to the test
circuitry is accomplished via the 4-wire test access port (TAP) interface.
In the normal mode, these devices are 18-bit universal bus transceivers that combine D-type latches and D-type
flip-flops to allow data flow in transparent, latched, or clocked modes. They can be used either as two 9-bit
transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples
of the data appearing at the device pins or to perform a self test on the boundary test cells. Activating the TAP
in the normal mode does not affect the functional operation of the SCOPE
universal bus transceivers.
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A-bus data is latched while CLKAB is held at a static low or high logic level.
Otherwise, if LEAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB is low, the
B outputs are active. When OEAB is high, the B outputs are in the high-impedance state. B-to-A data flow is
similar to A-to-B data flow but uses the OEBA, LEBA, and CLKBA inputs.
In the test mode, the normal operation of the SCOPE
universal bus transceivers is inhibited, and the test
circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry
performs boundary scan test operations according to the protocol described in IEEE Standard 1149.1-1990.
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