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參數(shù)資料
| 型號(hào)： | SN54ABT16863 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-Bit Bus Transceivers With 3-State Outputs(18位總線(xiàn)收發(fā)器(三態(tài)輸出)) |
| 中文描述： | 18 - 3位總線(xiàn)收發(fā)器態(tài)輸出（18位總線(xiàn)收發(fā)器（三態(tài)輸出）） |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 164K |
| 代理商： | SN54ABT16863 |
SN54ABT16863, SN74ABT16863
18-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS225C – JUNE 1992 – REVISED MAY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
1OEBA
1OEAB
1A1
1B1
To Eight Other Channels
56
1
55
2
2OEBA
2OEAB
2A1
2B1
To Eight Other Channels
29
28
41
16
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(except I/O ports) (see Note 1)
Voltage range applied to any output in the high or power-off state, V
O
Current into any output in the low state, I
O
: SN54ABT16863
–0.5 V to 7 V
–0.5 V to 7 V
–0.5 V to 5.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96 mA
128 mA
–18 mA
–50 mA
74
°
C/W
SN74ABT16863
Input clamp current, I
IK
(V
I
< 0)
Output clamp current, I
OK
(V
O
< 0)
Package thermal impedance,
θ
JA
(see Note 2): DL package
Storage temperature range, T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65
°
C to 150
°
C
recommended operating conditions (see Note 3)
SN54ABT16863
MIN
SN74ABT16863
MIN
UNIT
MAX
MAX
VCC
VIH
VIL
VI
IOH
IOL
t/
v
t/
VCC
TA
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
Supply voltage
4.5
5.5
4.5
5.5
V
High-level input voltage
2
2
V
Low-level input voltage
0.8
0.8
V
Input voltage
0
VCC
–24
0
VCC
–32
V
High-level output current
mA
Low-level output current
48
64
mA
Input transition rise or fall rate
Outputs enabled
10
10
ns/V
μ
s/V
°
C
Power-up ramp rate
200
200
Operating free-air temperature
–55
125
–40
85
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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