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參數(shù)資料
| 型號： | SN54ABT162540 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-Bit Buffers/Drivers With 3-State Outputs(16位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| 中文描述： | 16位緩沖器/驅(qū)動器與3態(tài)輸出（16位緩沖器/驅(qū)動器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 94K |
| 代理商： | SN54ABT162540 |
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1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y6
GND
1Y7
1Y8
2Y1
2Y2
GND
2Y3
2Y4
V
CC
2Y5
2Y6
GND
2Y7
2Y8
2OE1
1OE2
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE2
SN54ABT162540 . . . WD PACKAGE
SN74ABT162540 . . . DL PACKAGE
(TOP VIEW)
SN54ABT162540, SN74ABT162540
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS244 – JULY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
6–1
Output Ports Have Equivalent 25-
Series
Resistors, So No External Resistors Are
Required
Members of the Texas Instruments
Widebus
Family
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25
°
C
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
Packaged in Plastic 300-mil Shrink
Small-Outline Packages and 380-mil
Fine-Pitch Ceramic Flat Packages Using
25-mil Center-to-Center Spacings
description
These 16-bit buffers and bus drivers provide a
high-performance bus interface for wide data
paths.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all corresponding
outputs are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include 25-
series resistors to reduce overshoot
and undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT162540 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ABT162540 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74ABT162540 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE2
OUTPUT
Y
OE1
L
A
L
L
H
L
L
H
L
H
X
X
Z
X
H
X
Z
Widebus and EPIC-
ΙΙ
B are trademarks of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ABT162540 | 16-Bit Buffers/Drivers With 3-State Outputs(16位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN54ABT162541 | 16-Bit Buffers/Drivers With 3-State Outputs(16位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN74ABT162541 | 16-Bit Buffers/Drivers With 3-State Outputs(16位緩沖器/驅(qū)動器(三態(tài)輸出)) |
| SN54ABT162600 | 18-Bit Universal Bus Transceivers With 3-State Outputs(18位通用總線收發(fā)器(三態(tài)輸出)) |
| SN74ABT162600 | 18-Bit Universal Bus Transceivers With 3-State Outputs(18位通用總線收發(fā)器(三態(tài)輸出)) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABT16260 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT162601 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABT162601WD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABT16260WD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SN54ABT162823 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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