參數(shù)資料
型號(hào): SN5407W
廠商: Texas Instruments, Inc.
英文描述: HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS
中文描述: 十六進(jìn)制緩沖器/配合開放的驅(qū)動(dòng)集電極高壓輸出
文件頁數(shù): 2/13頁
文件大小: 475K
代理商: SN5407W
SDLS032G DECEMBER 1983 REVISED MAY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These circuits are completely compatible with most TTL families. Inputs are diode clamped to minimize
transmission-line effects, which simplifies design. Typical power dissipation is 145 mW, and average
propagation delay time is 14 ns.
logic diagram, each buffer/driver (positive logic)
A
Y
schematic
Resistor values shown are nominal.
6 k
Input A
Output Y
GND
VCC
3.4 k
1.6 k
100
1 k
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
Input voltage, V
I
(see Note 1)
Output voltage, V
O
(see Notes 1 and 2): SN5407, SN7407
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN5417, SN7417
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θ
JA
(see Note 3): D package
N package
NS package
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltage values are with respect to GND.
2. This is the maximum voltage that should be applied to any output when it is in the off state.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
5.5 V
30 V
15 V
86
°
C/W
80
°
C/W
76
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
°
C to 150
°
C
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