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參數(shù)資料
| 型號(hào)： | SMJ320C25-50GB |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 2/54頁 |
| 文件大?。?/td> | 614K |
| 代理商： | SMJ320C25-50GB |
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SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
2
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
description (continued)
The SM/SMJ320VC33 can perform parallel multiply and ALU operations on integer or floating-point data in a
single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated
ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short
machine-cycle time. High performance and ease of use are the results of these features.
General-purpose applications are greatly enhanced by the large address space, multiprocessor interface,
internally and externally generated wait states, one external interface port, two timers, one serial port, and
multiple-interrupt structure. The SM320C3x supports a wide variety of system applications from host processor
to dedicated coprocessor. High-level-language support is easily implemented through a register-based
architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported
floating-point arithmetic.
JTAG scan-based emulation logic
The 320VC33 contains a JTAG port for CPU emulation within a chain of any number of other JTAG devices.
The JTAG port on this device does not include a pin-by-pin boundary scan for point-to-point board level test.
The Boundary Scan tap input and output is internally connected with a single dummy register allowing loop back
tests to be performed through that JTAG domain.
The JTAG emulation port of this device also includes two additional pins, EMU0 and EMU1, for global control
of multiple processors conforming to the TI emulation standard. These pins are open collector-type outputs
which are wire ORed and tied high with a pullup. Non-TI emulation devices should not be connected to these
pins.
The VC33 instruction register is 8 bits long. Table 1 shows the instructions code. The uses of SAMPLE and
HIGHZ opcodes, though defined, have no meaning for the SM/SMJ320VC33, which has no boundary scan. For
example, HIGHZ will affect only the dummy cell (no meaning) and will not put the device pins in a
high-impedance state.
Table 1. Boundary-Scan Instruction Code
INSTRUCTION NAME
INSTRUCTION CODE
EXTEST
00000000
BYPASS
11111111
SAMPLE
00000010
Boundry is only one dummy cell
HIGHZ
PRIVATE1
00000110
Boundry is only one dummy cell
00000011
PRIVATE2
PRIVATE3
00100000
00100001
PRIVATE4
PRIVATE5
PRIVATE6
00100010
00100011
00100100
PRIVATE7
PRIVATE8
00100101
00100110
PRIVATE9
PRIVATE10
PRIVATE11
00100111
00101000
00101001
Use of Private opcodes could cause the device to operate in an unexpected manner.
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