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2037-07 9/23/99
SMH4042
Design Considerations for a CompactPCI Board
Figure 2 is a generic representation of a CompactPCI board and it illustrates how the SMH4042 is the key component
in the board insertion/removal process. The illustrations that follow show in more detail how the various blocks interface
to the SMH4042.
Power Busses
It is important in the design of the board to insure the backend logic is isolated from the power control circuits and other
early power circuits such as FPGAs and the I/O interface circuits. In the illustration shown below, the early power
busses for +5V, +3V have series current limiting resistors. These values should be calculated so as to limit the in-rush
current that will initially charge the capacitive load of the early power circuits. As the card is inserted further, the medium
length pins engage and short out the current limiting resistors. Note the placement of the sense (shunt) resistors. They
are in series with the power-FETs and no voltage drop will be detected across the resistor until VGATE is applied to
the power-FETs. The sense resistor values are determined by dividing 50mV by the current spec for that supply.
It should be noted that there is an inherent delay from VGATE turning on to VGATE3 turning on. The typical delay is
illustrated in Figure 4.
Figure 2. Block diagram of typical CompactPCIboard.
CompactPCI
Applications Aid
Backend Power Plane
and Logic
B
I
Backend Power
SwitchingCircuits
SMH4042
RESET
V(I/O)
5V
3.3V
GND
BD_SEL#
GND
GND
GND
GND
5V
5V
+12V, -12V
P1
P2
ENUM#
CARD_3V_MON
CARD_5V_MON
VGATE3
VGATE5
PCI_RST#
GND
HST_3V_MON
VCC5
BD_SEL2#
Precharge
Circuit
V(I/O)
LOCAL_PCI_RST#
Current
limiting
resistors
V(I/O)
V(I/O)
V(I/O)
eP
SGNL_VLD
CBI_3
CBI_5
eP
HEALTHY#
Capacitance
8.8
f each
BD_SEL1#
1Vref
Current
sense
resistors
2037 ILL23.1