參數(shù)資料
型號： SM320C6413ZTSA500
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Fixed-Point Digital Signal Processors
中文描述： 定點數(shù)字信號處理器
文件頁數(shù)： 9/140頁
文件大?。?/td> 1958K
代理商： SM320C6413ZTSA500
Tables
9
April 2004
Revised May 2005
SPRS247E
Table
Page
7
2
7
3
7
4
7
5
7
6
Timing Requirements for CLKIN
Switching Characteristics Over Recommended Operating Conditions for CLKOUT4
Switching Characteristics Over Recommended Operating Conditions for CLKOUT6
Timing Requirements for AECLKIN for EMIFA
Switching Characteristics Over Recommended Operating Conditions for AECLKOUT1
for the EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for AECLKOUT2
for the EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for Asynchronous Memory Cycles for EMIFA Module
Switching Characteristics Over Recommended Operating Conditions for Asynchronous
Memory Cycles for EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for Programmable Synchronous Interface Cycles for EMIFA Module
Switching Characteristics Over Recommended Operating Conditions for Programmable Synchronous
Interface Cycles for EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for Synchronous DRAM Cycles for EMIFA Module
Switching Characteristics Over Recommended Operating Conditions for Synchronous DRAM
Cycles for EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for the HOLD/HOLDA Cycles for EMIFA Module
Switching Characteristics Over Recommended Operating Conditions for the HOLD/HOLDA
Cycles for EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for the BUSREQ
Cycles for EMIFA Module
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for Reset
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions During Reset
Timing Requirements for External Interrupts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for McASP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for McASP
Timing Requirements for I2C Timings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics for I2C Timings
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for Host-Port Interface Cycles
Switching Characteristics Over Recommended Operating Conditions During Host-Port
Interface Cycles
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for McBSP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for McBSP
Timing Requirements for FSR When GSYNC = 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timing Requirements for McBSP as SPI Master or Slave:
CLKSTP = 10b, CLKXP = 0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for McBSP as
SPI Master or Slave: CLKSTP = 10b, CLKXP = 0
Timing Requirements for McBSP as SPI Master or Slave:
CLKSTP = 11b, CLKXP = 0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for McBSP as
SPI Master or Slave: CLKSTP = 11b, CLKXP = 0
Timing Requirements for McBSP as SPI Master or Slave:
CLKSTP = 10b, CLKXP = 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Characteristics Over Recommended Operating Conditions for McBSP as
SPI Master or Slave: CLKSTP = 10b, CLKXP = 1
93
94
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95
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95
7
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9
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97
100
7
10
7
11
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100
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7
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7
13
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104
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7
14
7
15
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110
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16
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118
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120
7
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25
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120
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7
26
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29
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128
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128
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7
31
129
7
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129
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7
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130
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130
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7
35
Timing Requirements for McBSP as SPI Master or Slave:
CLKSTP = 11b, CLKXP = 1
131
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