參數(shù)資料
型號(hào)： SM320C6201BGLPW15
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： DIGITAL SIGNAL PROCESSOR
中文描述： 數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 1/64頁(yè)
文件大?。?/td> 948K
代理商： SM320C6201BGLPW15
SGUS031B – APRIL 2000 – REVISED AUGUST 2001
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Highest Performance Fixed-Point Digital
Signal Processor (DSP) SM/SMJ320C6201B
– 5-, 6.7-ns Instruction Cycle Time
– 150 and 200-MHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 1200 and 1600 MIPS
VelociTI
Advanced Very Long Instruction
Word (VLIW) C62x
CPU Core
– Eight Independent Functional Units:
– Six ALUs (32-/40-Bit)
– Two 16-Bit Multipliers (32-Bit Results)
– Load-Store Architecture With 32 32-Bit
General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
Instruction Set Features
– Byte-Addressable (8-, 16-, 32-Bit Data)
– 32-Bit Address Range
– 8-Bit Overflow Protection
– Saturation
– Bit-Field Extract, Set, Clear
– Bit-Counting
– Normalization
1M-Bit On-Chip SRAM
– 512K-Bit Internal Program/Cache
(16K 32-Bit Instructions)
– 512K-Bit Dual-Access Internal Data
(64K Bytes) Organized as Two Blocks for
Improved Concurrency
32-Bit External Memory Interface (EMIF)
– Glueless Interface to Synchronous
Memories: SDRAM and SBSRAM
– Glueless Interface to Asynchronous
Memories: SRAM and EPROM
Four-Channel Bootloading
Direct-Memory-Access (DMA) Controller
with an Auxiliary Channel
16-Bit Host-Port Interface (HPI)
– Access to Entire Memory Map
Two Multichannel Buffered Serial Ports
(McBSPs)
– Direct Interface to T1/E1, MVIP, SCSA
Framers
– ST-Bus-Switching Compatible
– Up to 256 Channels Each
– AC97-Compatible
– Serial Peripheral Interface (SPI)
Compatible (Motorola
)
Two 32-Bit General-Purpose Timers
Flexible Phase-Locked Loop (PLL) Clock
Generator
IEEE-1149.1 (JTAG
) Boundary-Scan
Compatible
429-Pin BGA Package (GLP Suffix)
CMOS Technology
– 0.18-
μ
m/5-Level Metal Process
3.3-V I/Os, 1.8-V Internal
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
C62x and VelociTI are trademarks of Texas Instruments Incorporated.
Motorola is a trademark of Motorola, Inc.
IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
Copyright
2001, Texas Instruments Incorporated
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