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參數(shù)資料
| 型號： | SLY2016 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Alphanumeric Intelligent Display DEVICES WITH MEMORY/DECODER/ DRIVER |
| 中文描述： | 字母數(shù)字智能顯示設(shè)備與記憶/解碼器/驅(qū)動器 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 459K |
| 代理商： | SLY2016 |
www.in
fi
neon.com/opto
1-888-In
fi
neon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG
Regensburg, Germany
www.osram-os.com
+49-941-202-7178
2000 In
fi
neon Technologies Corp.
Optoelectronics Division
San Jose, CA
SLR/SLO/SLG/SLY2016
3
March 23, 2000-01
AC Characteristics
parameters at
(guaranteed minimum timing
=5.0 V ±0.5 V)
V
CC
Note:
1)
T
ACC
=Set Up Time+Write Time+Hold Time
Loading Data
The desired data code (D0–D6) and digit address (A0, A1) must
be held stable during the write cycle for storing new data.
Data entry may be asynchronous. Digit 0 is defined as right
hand digit with A1=A2=0.`
Clearing the entire internal four-digit memory can be accom-
plished by holding the clear (CLR) low for 1.0 msec minimum.
The clear function will clear the ASCII RAM. Loading an illegal
data code will display a blank.
Typical Loading State Table
WR
A1 A0 D6 D5 D4 D3 D2 D1 D0 Digit
Display Blanking
Blank the display by loading a blank or space into each digit of
the display or by using the (BL) display blank input. Setting the
(BL) input low does not affect the contents of data memory.
A flashing circuit can easily be constructed using a 555 as table
multivibrator. Figure 3 illustrates a circuit in which varying R1
(100K~10K) will have a flash rate of 1.0 Hz~10 Hz.
The display can be dimmed by pulse width modulating the (BL)
at a frequency sufficiently fast to not interfere with the internal
clock. The dimming signal frequency should be 2.5 kHz or
higher. Dimming the display also reduces power consumption.
Parameter
Symbol
–40
°
C
+25
°
C
+85
°
C
Unit
Address Set
Up Time
T
AS
10
10
10
ns
Write Time
T
W
60
70
90
ns
Data Set Up
Time
T
DS
20
30
50
ns
Address Hold
Time
T
AH
20
30
40
ns
Data Hold Time
T
DH
20
30
40
ns
Access Time
T
ACC (1)
90
110
140
ns
Clear Disable
Time
T
CLRD
1.0
1.0
1.0
μ
s
Clear Time
T
CLR
1.0
1.0
1.0
ms
3
G
G
G
G
B
B
B
see char. set
2
R
R
R
L
L
L
L
1
E
E
U
U
U
E
E
0
Y
E
E
E
E
E
W
H
L
L
L
L
L
L
L
previously loaded display
H
L
L
H
L
H
H
L
L
H
L
L
H
L
L
H
L
H
see character code
L
L
H
H
L
L
X
L
H
L
H
H
L
X
L
L
H
L
L
L
H
H
H
L
H
H
L
L
L
H
L
H
H
H
L
L
H
H
An example of a simple dimming circuit using a 556 is illus-
trated in Figure 4. Adjusting potentiometer R3 will dim the dis-
play by changing the blanking pulse duty cycle.
Figure 3. Flashing Circuit Using a 555 and Flashing
(Blanking) Timing
Figure 4. Dimming Circuit Using a 556 and Dimming
(Blanking) Timing
Blanking Pulse Width
≈
50% Duty Factor
500 ms
~
2 Hz Blanking Frequency
1
0
~
555
Timer
R1
4.7 K
R2
100 K
C4
0.01
μ
F
C3
10
μ
F
VCC=5.0 V
To BL
Pin on
Display
1
2
3
4
8
7
6
5
C3
1000 pF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
556
Dual Timer
R2
47 K
R1
200
C1
4700 pF
C4
0.01
μ
F
R3
500 K
VCC=5.0 V
Dimming (Blanking)
Control
C2
0.01
μ
F
To BL Pin
on Display
1
0
200
μ
s
Blanking Pulse Width
4
μ
s min., 196
μ
s max.
5 KHz Blanking Frequency
~
~
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