
SL811HS Embedded USB Host/Slave Controller
SL811HS
Cypress Semiconductor Corporation
3901 North First Street
San Jose
, CA 95134
408-943-2600
Document 38-08008 Rev. *B
Revised June 13, 2005
1.0
Features
The first USB Host/Slave controller for embedded systems
in the market with a standard microprocessor bus interface.
Supports both full-speed (12 Mbps) and low-speed (1.5
Mbps) USB transfer in both master and slave modes
Conforms to USB Specification 1.1 for Full- and Low-speed
Operates as a single USB host or slave under software
control
Automatic detection of either low or full-speed devices
8-bit bidirectional data, port I/O (DMA supported in slave
mode)
On-chip SIE and USB transceivers
On-chip single root HUB support
256-byte internal SRAM buffer
Ping-pong buffers for improved performance
Operates from 12- or 48-MHz crystal or oscillator (built-in
DPLL)
5V-tolerant interface
Suspend/resume, wake up, and low-power modes are
supported
Auto-generation of SOF and CRC5/16
Auto-address increment mode, saves memory Read/Write
cycles
Development kit including source code drivers is available
Backward-compatible with SL11H, both pin and function-
ality
3.3V power source, 0.35 micron CMOS technology
Available in both a 28-pin PLCC package (SL811HS) and
a 48-pin TQFP package (SL811HST-AC).
2.0
Introduction
2.1
Block Diagram
The SL811HS is an Embedded USB Host/Slave Controller
capable of communicating in either full-speed or low-speed.
The SL811HS can interface to devices such as micropro-
cessors, microcontrollers, DSPs, or directly to a variety of
buses such as ISA, PCMCIA, and others. The SL811HS USB
Host Controller conforms to USB Specification 1.1.
The SL811HS USB Host/Slave Controller incorporates USB
Serial Interface functionality along with internal full/low-speed
transceivers. The SL811HS supports and operates in USB full-
speed mode at 12 Mbps, or at low-speed 1.5 Mbps mode.
When in host mode, the SL811HS is the master and controls
the USB bus and the devices that are connected to it. In
peripheral mode, otherwise known as a slave device, the
SL811HS can operate as a variety of full or low speed devices.
The SL811HS data port and microprocessor interface provide
an 8-bit data path I/O or DMA bidirectional, with interrupt
support to allow easy interface to standard microprocessors or
microcontrollers such as Motorola or Intel CPUs and many
others. The SL811HS has 256-bytes of internal RAM, which is
used for control registers and data buffer.
The available package types offered are a 28-pin PLCC
(SL811HS) and a 48-pin TQFP package (SL811HST-AC).
Both packages operate at 3.3 VDC. The I/O interface logic is
5V-tolerant.
X1
X2
D
+
D-
INTR
nW R
nRD
nCS
nRST
D0-7
GENERATOR
USB
Root HUB
XCVRS
SERIAL
INTERFACE
ENGINE
256 Byte RAM
BUFFERS
CONTROL
REGISTERS
INTERRUPT
CLOCK
&
CONTROLLER
PROCESSOR
INTERFACE
M aster/Slave
Controller
nDRQ
nDACK
DMA
Interface
Figure 2-1. SL811HS USB Host/Slave Controller Functional Block Diagram