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參數(shù)資料
| 型號： | SL28EB740AZI |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 12/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK CK505 TNLCK/TPCLF 56TSSOP |
| 標(biāo)準(zhǔn)包裝： | 35 |
| 系列： | EProClock® |
| 類型： | 時鐘/頻率發(fā)生器，多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務(wù)器 |
| 輸入： | 時鐘，晶體 |
| 輸出： | HCSL，LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:16 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 166.67MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
SL28EB740
DOC#: SP-AP-0006 (Rev. AC)
Page 2 of 21
56-TSSOP Pin Definitions
Pin No.
Name
Type
Description
1
NC
No Connect.
2
NC
No Connect.
3
CLKREQ#1**
I, PD
3.3V clock request input (internal 100K-ohm pull-down)
4
CLKREQ#2**
I, PD
3.3V clock request input (internal 100K-ohm pull-down)
5
PCI0 / SEL_SATA75**
I/O, SE
PD
33MHz clock output/3.3V LVTTL input to enable 75MHz SATA (internal
100K-ohm pull-down)
0 = SATA75/SRC0 = 100MHz, 1 = SATA75/SRC0 = 75MHz
6
GND_PCI
GND
Ground
7
VDD_PCI
PWR
3.3V Power supply
8
PCIF / ITP_EN**
I/O, SE,
PD
33 MHz free running clock output/3.3V LVTTL input to enable SRC6 or
CPU2_ITP (sampled on the CKPWRGD assertion)
0= SRC6, 1= CPU2
9
CLKREQ#3**
I, PD
3.3V clock request input (internal 100K-ohm pull-down)
10
12_48M / SEL12_48*
I/O, SE
PU
12 MHz/ 48MHz Clock output/3.3V-tolerance input for 12MHz or 48MHz
selection (Sampled at CKPWRGD assertion) (internal 100K-ohm pull-up)
0 = 48M, 1 = 12M
11
VDD_48
PWR
3.3V Power supply
12
48M / FSA**
I/O
PD
Fixed 48 MHz clock output/3.3V-tolerant input for CPU frequency selection
(internal 100K-ohm pull-down)
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
13
GND_48
GND
Ground
14
DOT96
O, DIF
Fixed true 96MHz clock output
15
DOT96#
O, DIF
Fixed complement 96MHz clock output
16
FSB**
I, PD
3.3V-tolerant input for CPU frequency selection (internal 100K-ohm pull-down)
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
17
GND_SATA
GND
Ground
18
SATA75M / SRC0
O, DIF
75MHz or 100MHz True differential serial reference clock
19
SATA75M# / SRC0#
O, DIF
75MHz or 100MHz Complement differential serial reference clock
20
VDD_SATA
PWR
3.3V Power supply
21
SRC1
O, DIF
100MHz True differential serial reference clock
22
SRC1#
O, DIF
100MHz Complement differential serial reference clock
23
SRC2
O, DIF
100MHz True differential serial reference clock
24
SRC2#
O, DIF
100MHz Complement differential serial reference clock
25
SRC3
O, DIF
100MHz True differential serial reference clock
26
SRC3#
O, DIF
100MHz Complement differential serial reference clock
27
GND_SRC
GND
Ground
28
VDD_SRC
PWR
3.3V Power supply
29
SRC4#
O, DIF
100MHz True differential serial reference clock
30
SRC4
O, DIF
100MHz Complement differential serial reference clock
31
SRC5#
O, DIF
100MHz True differential serial reference clock
32
SRC5
O, DIF
100MHz Complement differential serial reference clock
33
GND_SRC
GND
Ground
34
VDD_SRC
PWR
3.3V Power supply
35
SRC6# / CPU2#_ITP
O, DIF
Selectable complementary differential CPU or SRC clock output.
ITP_EN = 0 @ CKPWRGD assertion = SRC6
ITP_EN = 1 @ CKPWRGD assertion = CPU2
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| SL28EB740AZIT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Tunnel Creek Queen’s Bay platform RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28EB742ALC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 SL CLOCK 12/48MHz app x86 Cedarview RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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