TDC DOT96 Duty Cycle Measured " />
參數(shù)資料
型號: SL28774ELI
廠商: Silicon Laboratories Inc
文件頁數(shù): 7/19頁
文件大?。?/td> 0K
描述: IC CLOCK CK505 CALPELLA 32QFN
標準包裝: 624
系列: EProClock®
類型: 時鐘/頻率發(fā)生器,多路復用器
PLL:
主要目的: Intel CPU 服務器
輸入: 晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:8
差分 - 輸入:輸出: 無/是
頻率 - 最大: 133MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: *
封裝/外殼: *
供應商設備封裝: *
包裝: *
SL28774
......................Document #: 001-08400 Rev ** Page 15 of 19
TDC
DOT96 Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
DOT96 Period
Measured at 0V differential at 0.1s
10.4156
10.4177
ns
TPERIODAbs
DOT96 Absolute Period
Measured at 0V differential at 0.1s
10.1656
10.6677
ns
TCCJ
DOT96 Cycle to Cycle Jitter
Measured at 0V differential at 1 clock
250
ps
LACC
DOT96 Long Term Accuracy
Measured at 0V differential at 1 clock
100
ppm
TR / TF
DOT96 Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
27M_NSS/27_SS at 3.3V
TDC
Duty Cycle
Measurement at 1.5V
45
55
%
TPERIOD
Spread 27M Period
Measurement at 1.5V
37.03594
37.03813
ns
Spread Enabled 27M Period
Measurement at 1.5V
37.12986
37.13172
ns
TR / TF
Rising and Falling Edge Rate
Measured between 0.8V and 2.0V
1.0
4.0
V/ns
TCCJ
Cycle to Cycle Jitter
Measurement at 1.5V
300
ps
LACC
27_M Long Term Accuracy
Measured at crossing point VOX
–50
ppm
REF
TDC
REF Duty Cycle
Measurement at 1.5V
45
55
%
TPERIOD
REF Period
Measurement at 1.5V
69.82033
69.86224
ns
TPERIODAbs
REF Absolute Period
Measurement at 1.5V
68.83429
70.84826
ns
THIGH
REF High time
Measurement at 2V
29.97543
38.46654
ns
TLOW
REF Low time
Measurement at 0.8V
29.57543
38.26654
ns
TR / TF
REF Rising and Falling Edge Rate
Measured between 0.8V and 2.0V
1.0
4.0
V/ns
TSKEW
REF Clock to REF Clock
Measurement at 1.5V
500
ps
TCCJ
REF Cycle to Cycle Jitter
Measurement at 1.5V
1000
ps
LACC
Long Term Accuracy
Measurement at 1.5V
100
ppm
ENABLE/DISABLE and SET-UP
TSTABLE
Clock Stabilization from Power-up
1.8
ms
TSS
Stopclock Set-up Time
10.0
ns
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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