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SL28773
......................Document #: 001-08400 Rev ** Page 10 of 21
.
The SL28773 requires a Parallel Resonance Crystal. Substi-
tuting a series resonance crystal causes the SL28773 to
operate at the wrong frequency and violates the ppm specifi-
cation. For most applications there is a 300-ppm frequency
shift between series and parallel crystals due to incorrect
loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, use the total capac-
itance the crystal sees to calculate the appropriate capacitive
loading (CL).
Figure 1 shows a typical crystal configuration using the two
trim capacitors. It is important that the trim capacitors are in
series with the crystal. It is not true that load capacitors are in
parallel with the crystal and are approximately equal to the
load capacitance of the crystal.
Calculating Load Capacitors
In addition to the standard external trim capacitors, consider
the trace capacitance and pin capacitance to calculate the
crystal loading correctly. Again, the capacitance on each side
is in series with the crystal. The total capacitance on both side
is twice the specified crystal load capacitance (CL). Trim
capacitors are calculated to provide equal capacitive loading
on both sides.
1
0
27M_NSS
27M_SS
-1.75%
1
0
1
27M_NSS
27M_SS
+/-0.5%
1
0
1
0
27M_NSS
27M_SS
+/-0.75%
10
11
N/A
11
00
N/A
11
01
N/A
11
10
N/A
11
N/A
B1b4
B1b3
B1b2
B1b1
Pin7
Pin 8
Spread
(%)
Table 5. Output Driver Status during CPU_STP#
CPU_STP# Asserted
SMBus OE Disabled
Single-ended Clocks
Stoppable
Running
Driven low
Non stoppable
Running
Differential Clocks
Stoppable
Clock driven high
Clock driven low
Clock# driven low
Non stoppable
Running
Table 6. Output Driver Status
All Single-ended Clocks
All Differential Clocks
w/o Strap
w/ Strap
Clock
Clock#
PD# = 0 (Power down)
Low
Hi-z
Low
Table 7. Crystal Recommendations
Frequency
(Fund)
Cut
Loading
Load Cap
Drive
(max.)
Shunt Cap
(max.)
Motional
(max.)
Tolerance
(max.)
Stability
(max.)
Aging
(max.)
14.31818 MHz
AT
Parallel
20 pF
0.1 mW
5 pF
0.016 pF
35 ppm
30 ppm
5 ppm
Figure 1. Crystal Capacitive Clarification
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SL28773ELIT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Comm app w/PCIe requirements & Intel RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28774ELC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Shrink CK505 for Calpella platforms RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28774ELCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Shrink CK505 for Calpella platforms RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28774ELI | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Shrink CK505 for Calpella platforms RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SL28774ELIT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Shrink CK505 for Calpella platforms RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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