參數(shù)資料
型號(hào): SL28540ALC
廠(chǎng)商: Silicon Laboratories Inc
文件頁(yè)數(shù): 4/25頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK CK540 LP MOBILE 56QFN
標(biāo)準(zhǔn)包裝: 260
類(lèi)型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU 服務(wù)器
輸入: 晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:17
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 200MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 56-QFN(8x8)
包裝: 托盤(pán)
SL28540
................................................... Document #: Page 12 of 25
PD_RESTORE
If a ‘0’ is set for Byte 0 bit 0 then, upon assertion of PWRDWN#
LOW, the SL28540 initiates a full reset. The result of this is that
the clock chip emulates a cold power on start and goes to the
“Latches Open” state. If the PD_RESTORE bit is set to a ‘1’
then the configuration is stored upon PWRDWN# asserted
LOW. Note that if the iAMT bit, Byte 0 bit 3, is set to a ‘1’ then
the PD_RESTORE bit must be ignored. In other words, in Intel
iAMT mode, PWRDWN# reset is not allowed.
PWRDWN# (Power down) Clarification
The CKPWRGD/PWRDWN# pin is a dual-function pin. During
initial power up, the pin functions as CKPWRGD. Once
CKPWRGD has been sampled HIGH by the clock chip, the pin
assumes PD# functionality. The PD# pin is an asynchronous
active LOW input used to shut off all clocks cleanly before
shutting off power to the device. This signal is synchronized
internally to the device before powering down the clock
synthesizer. PD# is also an asynchronous input for powering
up the system. When PD# is asserted LOW, clocks are driven
to a LOW value and held before turning off the VCOs and the
crystal oscillator.
PWRDWN# (Power down) Assertion
When PD is sampled HIGH by two consecutive rising edges
of CPUC, all single-ended outputs will be held LOW on their
next HIGH-to-LOW transition and differential clocks must held
LOW. When PD mode is desired as the initial power on state,
PD must be asserted HIGH in less than 10
s after asserting
CKPWRGD.
PWRDWN# Deassertion
The power up latency is less than 1.8 ms. This is the time from
the deassertion of the PD# pin or the ramping of the power
supply until the time that stable clocks are generated from the
clock chip. All differential outputs stopped in a three-state
condition, resulting from power down are driven high in less
than 300
s of PD# deassertion to a voltage greater than
200 mV. After the clock chip’s internal PLL is powered up and
locked, all outputs are enabled within a few clock cycles of
each clock. Figure 4 is an example showing the relationship of
clocks coming up.
PD#
USB, 48MHz
DOT96T
DOT96C
SRCT 100MHz
SRCC 100MHz
CPUT, 133MHz
PCI, 33 MHz
REF
CPUC, 133MHz
Figure 3. Power down Assertion Timing Waveform
DOT 9 6 C
PD#
CP UC, 1 3 3 MHz
C P UT , 13 3MH z
S RCC 10 0MH z
U SB, 4 8 MH z
DOT 9 6 T
S RCT 1 0 0 MHz
Ts table
<1 .8 m s
PC I, 3 3 MH z
REF
Td r iv e _ PW R D N #
< 300
s , >2 00m V
Figure 4. Power down Deassertion Timing Waveform
相關(guān)PDF資料
PDF描述
D38999/24WJ29SN CONN RCPT 29POS JAM NUT W/SCKT
ICS94201DFT IC FREQ GENERATOR PROGR 56-SSOP
GTC030F-28-21S CONN RCPT 37POS PANEL MNT W/SCKT
ICS94201DFLFT IC FREQ GENERATOR PROGR 56-SSOP
D38999/20KF32SN CONN RCPT 32POS WALL MNT W/SCKT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SL28540ALCT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Low Power for Intel Mobile RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28541BQCR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Montevina, Atom RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28541BQCRT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Montevina, Atom RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28541BZC 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Montevina RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
SL28541BZC-2 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Montevina, Atom RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56