參數(shù)資料
型號: SL15303EZC
廠商: Silicon Laboratories Inc
文件頁數(shù): 1/10頁
文件大?。?/td> 0K
描述: IC CLOCK SSCG 1PLL 8TSSOP
標準包裝: 100
系列: EProClock®
類型: *
PLL: 帶旁路
輸入: 時鐘,晶體
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 200MHz
除法器/乘法器: 是/無
電源電壓: 2.25 V ~ 3.63 V
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
Rev 2.0, October 11, 2010
Page 1 of 10
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
SL15303
Key Features
Wide 2.5V to 3.3V +/-10% power supply range
1.8V+/-5% Power Supply
Programmable 3 outputs from 3 to 200MHz
Low CCJ and LTJ
Low power dissipation
Programmable Center or Down Spread Modulation
from 0.25 to 5.0%
8 to 48 MHz external crystal range
8 to 166 MHz external clock range
Integrated internal voltage regulator
Programmable PD#/OE/SSON#/FSEL functions
Programmable CL at XIN and XOUT pins
Programmable output rise and fall times
Programmable spread spectrum modulation
frequency from 30 to 120 kHz
Applications
Printers, MFPs
Digital Copiers
NBPCs and LCD Monitors
Routers, Servers and Switchers
HDTV and DVD-R/W
Description
The SL15303 a programmable low power Spread
Spectrum Clock Generator (SSCG) used for reducing
Electromagnetic Interference (EMI).
The product is designed using SpectraLinear proprietary
programmable EProClock phase-locked loop (PLL) and
Spread Spectrum Clock (SSC) technology to synthesize
and modulate the input clock. The modulated clock can
significantly reduce the measured EMI levels, and leading
to the compliance with regulatory agency requirements.
Up to 3 output clock frequencies, Spread %, output rise
and fall times, crystal load, modulation frequency and
PD#/OE/SSON#/FS functions can be programmed to meet
the needs of wide range of applications.
The SL15300 operates from 2.5V to 3.3V+/-10% or 1.8V+/-
5% power supply voltage ranges. Contact SLI for 1.8+/-5%
power supply operation specifications.
The product is offered in 8-pin TSSOP package with
commercial and industrial grades.
Benefits
Peak EMI reduction of 8 to 16 dB
Fast time-to-market
Cost Reduction
Reduction of PCB layers
Eleminates the need for higher order crystals (Xtals)
and crystal oscillators (XOs)
Block Diagram
3
PLL with
Modulation Control
4
Programmable
Configuration Register
2
300K
SSCLK1/REFCLK1
MF1*
XIN/CLKIN
XOUT
VSS
VDDO
Buffers,
Dividers
and
Switch
Matrix
PCin
PCout
6 SSCLK2/REFCLK2
7
SSCLK3/REFCLK3
MF2*
8
5
V-Reg
To Core
To Pin 1 Clock Driver
VDD
1
To Pin 2 and 7 Clock Driver
and Oscillator
*MF: Programmable input control pin as PD#, OE, SSON# (Spread On/Off) or FSEL (Frequency Select)
Programmable Spread Spectrum Clock Generator (SSCG)
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