參數(shù)資料
型號: Si9976DY
廠商: Vishay Intertechnology,Inc.
英文描述: N-Channel Half-Bridge Driver(N溝道半橋驅(qū)動器)
中文描述: N通道半橋驅(qū)動器(不適用溝道半橋驅(qū)動器)
文件頁數(shù): 4/5頁
文件大小: 123K
代理商: SI9976DY
Si9976DY
Vishay Siliconix
S-60752-Rev. E, 05-Apr-99
4
FaxBack 408-970-5600, request 70016
www.siliconix.com
PIN DESCRIPTION
Pin 1
No connection.
Pin 2: CAP
Connection for the positive terminal of the bootstrap capacitor
C
BOOT
. A 0.01-μF C
BOOT
capacitor can be used for most
applications.
Pin 3: V+
This is the only external power supply required for the
Si9976DY, and must be the same supply used to power the
half-bridge it is driving. The Si9976DY powers it’s low-voltage
logic, low-side gate driver, and bootstrap/charge pump circuits
from self-contained voltage regulators which require only a
bootstrap capacitor on the CAP pin and a bypass capacitor on
the V
DD
pin.
No voltage sensing circuitry monitors V+ directly; however, the
low-voltage, internally generated V
DD
supply and the
bootstrap voltage (which are derived from V+) are directly
protected by undervoltage monitors.
Pin 4: V
DD
Connection to the internally generated low-voltage supply
which must be bypassed to ground with a 0.01-
μ
F capacitor.
Pin 5: IN
Logic input. A low level input turns off the high-side
half-bridge MOSFET and, after an internally set dead time,
turns the low-side half-bridge MOSFET on. A high input level
has the opposite effect. The input is compatible with 5-, 12- or
15-V logic outputs.
Pin 6: EN
Enable input. A low EN input level prevents turn on of either
half-bridge MOSFET. If the Si9976DY is internally disabled as
a result of an output short-circuit condition, a low-to-high
transition on EN is required to clear the fault and resume
operation. The input logic levels are the same as IN.
Pin 7: V
CC
If the FAULT output is used, the V
CC
pin must be connected to
the logic supply voltage in order to set the high level of the
FAULT output. If the FAULT output is not used, this pin may
be left open with no effect on internal fault sensing or
protection circuitry.
Pin 8: FAULT
The Fault output is latched high when a short-circuit output
condition is detected. FAULT will return low when the circuit is
reset using the EN pin. The FAULT output also indicates the
status of the undervoltage sense circuit on V
DD
, however the
fault condition is cleared automatically when the undervoltage
condition clears.
Pin 9: G2
This pin drives the gate of the external low-side power
transistor.
Pin 10: GND
The ground return for V+, logic reference, and connection for
source of external low-side power transistor.
Pin 11
No connection.
Pin 12: G1
This pin drives the gate of the external high side power
transistor.
Pin 13: S1
Connection for the source of the external high-side power
transistor, the drain of the external low-side power transistor,
the negative terminal of the bootstrap capacitor, and the
system load. The voltage on this pin is sensed by the circuitry
that monitors the load for shorts.
Pin 14
No connection.
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