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| 型號(hào)： | Si91871DMP-35-T1 |
| 廠商： | Vishay Intertechnology,Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | HEATSINK TO-220 VERT MNT W/TAB |
| 中文描述： | 300 - mA的超低噪聲LDO穩(wěn)壓器排放的選項(xiàng) |
| 文件頁(yè)數(shù)： | 9/9頁(yè) |
| 文件大小： | 183K |
| 代理商： | SI91871DMP-35-T1 |
Si91871
Vishay Siliconix
New Product
Document Number: 72012
S-03156
—
Rev. B, 03-Feb-03
www.vishay.com
9
DETAILED DESCRIPTION
The Si91871 is a low-noise, low drop-out and low quiescent
current linear voltage regulator, packaged in a small footprint
MLP33-5 package. The Si91871 can supply loads up to
300 mA. As shown in the block diagram, the circuit consists of
a bandgap reference error, amplifier, p-channel pass transistor
and feedback resistor string. An external bypass capacitor
connected to the BP pin reduces noise at the output.
Additional blocks, not shown in the block diagram, include a
precise current limiter, reverse battery and current protection
and thermal sensor.
Thermal Overload Protection
The thermal overload protection limits the total power
dissipation and protects the device from being damaged.
When the junction temperature exceeds 150 C, the device
turns the p-channel pass transistor off.
Reverse Battery Protection
The Si91871 has a battery reverse protection circuitry that
disconnects the internal circuitry when V
IN
drops below the
GND voltage. There is no current drawn in such an event.
When the SD pin is hardwired to V
IN
, the user must connect
the SD pin to V
IN
via a 100-k resistor if reverse battery
protection is desired. Hardwiring the SD pin directly to the V
IN
pin is allowed when reverse battery protection is not desired.
Noise Reduction
An external 10-nF bypass capacitor at BP is used to create a
low pass filter for noise reduction. The start-up time is fast,
since a power-on circuit pre-charges the bypass capacitor.
After the power-up sequence the pre-charge circuit is switched
to standby mode in order to save current. It is therefore not
recommended to use larger bypass capacitor values than
50 nF. When the circuit is used without a capacitor, stable
operation is guaranteed.
Auto-Discharge
The Si91871 V
OUT
has an internal 100- (typ.) discharge path
to ground when the SD pin is low.
Stability
The circuit is stable with only a small output capacitor equal to
6 nF/mA (= 2 F @ 300 mA). Since the bandwidth of the error
amplifier is around 1-3 MHz and the dominant pole is at the
output node, the capacitor should be capacitive in this range,
i.e., for 150-mA load current, an ESR <0.2 is necessary.
Parasitic inductance of about 10 nH can be tolerated.
Safe Operating Area
The ability of the Si91871 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
P
D
= (V
IN
–
V
OUT
) * I
OUT
.
Junction temperature is defined as
T
J
= T
A
+ ((P
D
* (R
θ
JC
+ R
θ
CA
)).
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
P
D
= (T
J
- T
A
)/ (R
θ
JC
+ R
θ
CA
)
While allowable output current is calculated using the equation
I
OUT
= (T
J
- T
A
)/ (R
θ
JC
+ R
θ
CA
) * (V
IN
–
V
OUT
).
Ratings of the Si91871 that must be observed are
T
Jmax
= 125 C, T
Amax
= 85 C, (V
IN
–
V
OUT
)
max
= 5.3 V,
R
θ
JC
= 8 C/W.
The value of R
θ
CA
is dependent on the PC board used. The
value of R
θ
CA
for the board used in device characterization is
approximately 46 C/W.
Figure 1 shows the performance limits graphically for the
Si91871 mounted on the circuit board used for thermal
characterization.
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0
1
2
3
4
5
6
Figure 1.
Safe Operating Area
(
I
O
V
IN
- V
OUT
(V)
(V
IN
- V
OUT
)
MAX
= 5.3 V
T
A
= 50 C
T
A
= 85 C
T
A
= 70 C
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|---|---|
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