參數(shù)資料
型號(hào): SI9185DMP-12-T1
廠商: Vishay Intertechnology,Inc.
元件分類(lèi): 基準(zhǔn)電壓源/電流源
英文描述: Micropower 500-mA CMOS LDO Regulator
中文描述: 微500毫安的CMOS LDO穩(wěn)壓器
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 138K
代理商: SI9185DMP-12-T1
Si9185
Vishay Siliconix
Document Number: 71765
S-20641
Rev. B, 06-May-02
www.vishay.com
11
SENSE or ADJ
SENSE is used to sense the output voltage. Connect SENSE
to V
OUT
for the fixed voltage version. For the adjustable output
version, use a resistor divider R1 and R2, connect R1 from
V
OUT
to ADJ and R2 from ADJ to ground. R2 should be in the
25-k to 150-k range for low power consumption, while
maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
(1)
R1
V
OUT
V
ADJ
R2
V
ADJ
V
ADJ
is nominally 1.215 V.
SHUTDOWN (SD)
SD controls the turning on and off of the Si9185. V
OUT
is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. V
OUT
is guaranteed to be off when theSD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9185 will draw less than 2- A current from the
source. To automatically turn on V
OUT
whenever the input is
applied, tie the SD pin to V
IN
.
ERROR
ERROR is an open drain output that goes low when V
OUT
is
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. When a capacitor is
connected from DELAY to GROUND, the error signal transition
from low to high is delayed (see Delay section). This delayed
error signal can be used as the power-on reset signal for the
application system. (Refer to Figure 4.)
The ERROR pin is disconnected if not used.
DELAY
A capacitor from DELAY to GROUND sets the time delay for
ERROR going from low to high state. The time delay can be
calculated using the following formula:
(2)
T
delay
V
ADJ
C
delay
I
delay
The DELAY pin should be an open circuit if not used.
C
NOISE
For low noise application, connect a high frequency ceramic
capacitor from C
NOISE
to ground. A 0.01- F or a 0.1- F X5R
or X7R is recommended.
Safe Operating Area
The ability of the Si9185 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
P
D
= (V
IN
V
OUT
) * I
OUT
.
Junction temperature is defined as
T
J
= T
A
+ ((P
D
* (R
θ
JC
+ R
θ
CA
)).
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
P
D
= (T
J
T
A
)/ (R
θ
JC
+ R
θ
CA
)
While allowable output current is calculated using the equation
I
OUT
= (T
J
T
A
)/ (R
θ
JC
+ R
θ
CA
) * (V
IN
V
OUT
).
Ratings of the Si9185 that must be observed are
T
Jmax
= 125 C, T
Amax
= 85 C, (V
IN
V
OUT
)
max
= 5.3 V, R
θ
JC
= 4 C/W.
The value of R
θ
CA
is dependent on the PC board used. The
value of R
θ
CA
for the board used in device characterization is
approximately 46 C/W.
Figure 6 shows the performance limits graphically for the
Si9185 mounted on the circuit board used for thermal
characterization.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0
1
2
3
4
5
6
Figure 6.
(
I
O
T
A
= 0 C
V
IN
V
OUT
(V)
(V
IN
V
OUT
)
MAX
= 5.3 V
T
A
= 25 C
T
A
= 50 C
T
A
= 85 C
T
A
= 70 C
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