參數(shù)資料
型號: Si91845DT-18-T1
廠商: Vishay Intertechnology,Inc.
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 150-mA Ultra Low-Noise LDO Regulator With Error Flag and Discharge Option
中文描述: 150mA的超低噪音LDO調(diào)節(jié)器錯誤國旗和放電期權(quán)
文件頁數(shù): 9/9頁
文件大?。?/td> 126K
代理商: SI91845DT-18-T1
Si91845/6
Vishay Siliconix
Document Number: 71733
S-40591—Rev. B, 29-Mar-04
www.vishay.com
9
BLOCK DIAGRAM
Si91845/6
V
IN
Reference
+
Thermal
Sensor
Shutdown
Control
GND
ERROR
V
OUT
Reverse Polarity
Protection
Current
Limit
SD
BP
Si91845
Only
DETAILED DESCRIPTION
The Si91845/6 is a low-noise, low drop-out and low quiescent
current linear voltage regulator, packaged in a small footprint
Thin SOT23-6 package. The Si91845/6 can supply loads up to
300 mA. As shown in the block diagram, the circuit consists of a
bandgap reference, error amplifier, p-channel pass transistor and
feedback resistor string. An external bypass capacitor
connected to the BP pin reduces noise at the output. Additional
blocks, not shown in the block diagram, include a precise current
limiter, reverse battery and current protection, and thermal sensor.
Thermal Overload Protection
The thermal overload protection limits the total power dissipation
and protects the device from being damaged. When the junction
temperature exceeds 150 , the device turns the p-channel pass
transistor off.
Reverse Battery Protection
The Si91845/6 has a battery reverse protection circuitry that
disconnects the internal circuitry when V
IN
drops below the GND
voltage. There is no current drawn in such an event. When the
SD pin is hardwired to V
IN
, the user must connect the SD pin to
V
IN
via a 100-k resistor if reverse battery protection is desired.
Hardwiring the SD pin directly to the V
IN
pin is allowed when
reverse battery protection is not desired.
Noise Reduction
An external 10-nF bypass capacitor at BP is used to create a low
pass filter for noise reduction. The start-up time is fast, since a
power-on circuit pre-charges the bypass capacitor. After the
power-up sequence the pre-charge circuit is switched to standby
mode in order to save current. It is therefore not recommended
to use larger bypass capacitor values than 50 nF. When the
circuit is used without a capacitor, stable operation is guaranteed.
ERROR
ERROR is an open drain output that goes low when V
OUT
is less
than 4% of its normal value. To obtain a logic level output,
connect a pull-up resister from ERROR to V
OUT
or any other
voltage equal to or less than V
IN
. ERROR pin is high impedance
(off) when SD pin is low.
Auto-Discharge/No-Discharge
V
OUT
has an internal 100- (typ.) discharge path to ground when
SD pin is low. This applies only to the Si91845. The Si91846
does not have a discharge path when the SD pin is low.
Stability
The circuit is stable with only a small output capacitor equal to
6 nF/mA (= 1 F @ 150 mA). Since the bandwidth of the error
amplifier is around 1
3 MHz and the dominant pole is at the
output node, the capacitor should be capacitive in this range, i.e.,
for 150-mA load current, an ESR <0.4 is necessary. Parasitic
inductance of about 10 nH can be tolerated.
相關(guān)PDF資料
PDF描述
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參數(shù)描述
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