
Si9177
Vishay Siliconix
New Product
Document Number: 70312
S-03663—Rev. B, 07-Apr-03
www.vishay.com
5
DETAIL OPERATIONAL DESCRIPTION
Start-Up
When voltage is first applied to the V
IN
pin, the UVLO circuitry
prevents the internal p-channel MOSFET from turning on.
Once the V
IN
voltage exceeds the UVLO threshold of 2.4 V,
and with no other shutdown condition detected, an internal
power-on-reset timer is activated to delay the start of switching
if the BP/PSM pin is held a logic LOW level. The amount of
delay is set by the capacitor C
REF
on the REF pin and the peak
current in the inductor is limited to 600 mA. If the BP/PSM
pin
has a logic HIGH applied, then Bypass Mode soft-start is
achieved by gradually turning on the p-channel MOSFET in
40
μ
s insuring that the output voltage rises smoothly.
Pulse Skipping Mode
Si9177 is designed to operate with light loads. When the
BP/PSM
pin is connected to logic LOW level, the Si9177
operates in pulse-skipping mode. PSM enhances efficiency in
light load conditions when compared to fixed frequency PWM
mode because switch conduction losses, gate charge and
switching losses are reduced. By delivering energy to the load
only when needed, the p-channel MOSFET gate capacitance
is charged and discharged less frequently and MOSFET
conduction loss is minimized thereby reducing total losses and
increasing converter efficiency. In PSM, the switching
frequency, f
SW
, increases as and decreases as the load
current increases and decreases. The typical conversion
efficiency in PSM mode is 90%.
By operating as a constant on-time converter, the Si9177
achieves PSM operation. The p-channel MOSFET switching
transistor is turned on to deliver energy to the load. The switch
remains on for the minimum on-time or until the inductor
current reaches 600 mA. If the applied on-time is sufficient to
increase the output voltage above the in-regulation set point
(F
B
pin voltage is greater than V
FB
), the p-channel MOSFET
turns off for a minimum off-time and continues to apply
constant on-time pulses to insure regulation is maintained. If
the on-time of the p-channel switch causes the output voltage
to rise above the set point, the converter turns off and remains
off until the voltage on F
B
decreases below V
FB
.
The on-time and minimum off-time are set internally to
minimize ripple voltage at the maximum load current. The
Si9177 has internal compensation reducing the number of
required components and is designed for an inductor value of
1.5
μ
H and an output capacitor value of 10
μ
F.
BYPASS Mode
Si9177 can also operate in BYPASS mode to handle heavy
load currents or to provide the maximum output voltage to the
load. This mode is enabled by setting the BP/PSM pin to a logic
HIGH. In this mode the IC ignores the feedback signal at the
F
B
pin, forcing the internal p-channel MOSFET to turn on
continuously. The input-to-output voltage differential is
reduced to the voltage drop across the 150-m
MOSFET and
the inductor. Si9177 can bypass 800 mA at 95% typical
efficiency or provide nearly the entire input voltage to the load.
Whenever the converter enters BYPASS mode, the p-channel
MOSFET turns on gradually within 40
μ
s to reduce surge
current to the input capacitor.
Shutdown
Si9177 is designed to conserve as much battery life as
possible by decreasing current consumption during normal
operation, as well as the shutdown mode. With logic LOW level
on the ENABLE pin, the current consumption of the IC is
decreases to less than 1
μ
A by shutting off all circuits. A logic
HIGH enables the controller, allowing start up as described in
the “Start-Up” section above.
Reference and Power-On-Reset Timer
The reference voltage of Si9177 is set to 1.215 V. It is internally
connected to the non-inverting input of the error amplifier. The
power on reset delay time is set by the capacitance on the REF
pin and can be determined from the following relationship:
t
PORDELAY =
4
10
4
C
REF
Output Voltage
The Si9177 is designed with an adjustable output voltage,
V
OUT
, which is set by resistors R
1
and R
2
, and the feedback
voltage, V
FB
. V
OUT
is defined according to the following
relationship:
V
OUT
1
R
1
R
2
V
FB
where V
FB
is 1.215 V.
The values of R
1
and R
2
should be kept between 5 k
and
100 k
.
Power Switches
The p-channel MOSFET switch is integrated in Si9177 for
optimum performance and minimum overall converter size.
This MOSFET is designed to minimize the gate charge loss as
well as the conduction loss. The typical on-resistance is
150 m
with a minimum input voltage of 3.3 V.