參數(shù)資料
型號(hào): SI5367B-B-GQ
廠商: SILICON LABORATORIES
元件分類: 數(shù)字傳輸電路
英文描述: レP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PQFP100
封裝: 14 X 14 MM, ROHS COMPLIANT, MS-026AED-HD, TQFP-100
文件頁(yè)數(shù): 1/18頁(yè)
文件大?。?/td> 250K
代理商: SI5367B-B-GQ
Preliminary Rev. 0.3 3/07
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Copyright 2007 by Silicon Laboratories
Si5367
Si5367
μP-P
ROGRAMMABLE
P
RECISION
C
LOCK
M
ULTIPLIER
Description
The Si5367 is a low jitter, precision clock multiplier for
applications requiring clock multiplication without jitter
attenuation. The Si5367 accepts four clock inputs ranging
from 10 to 707 MHz and generates five frequency-multiplied
clock outputs ranging from 10 to 945 MHz and select
frequencies to 1.4 GHz. The device provides virtually any
frequency translation combination across this operating
range. The outputs are divided down separately from a
common source. The Si5367 input clock frequency and clock
multiplication ratio are programmable through an I
2
C or SPI
interface. The Si5367 is based on Silicon Laboratories' 3rd-
generation DSPLL
technology, which provides any-rate
frequency synthesis in a highly integrated PLL solution that
eliminates the need for external VCXO and loop filter
components. The DSPLL loop bandwidth is digitally
programmable, providing jitter performance optimization at
the application level. Operating from a single 1.8 or 2.5 V
supply, the Si5367 is ideal for providing clock multiplication in
high performance timing applications.
Applications
SONET/SDH OC-48/OC-192 line cards
GbE/10GbE, 1/2/4/8/10GFC line cards
ITU G.709 and custom FEC line cards
Wireless basestations
Data converter clocking
xDSL
SONET/SDH + PDH clock synthesis
Test and measurement
Features
Generates any frequency from 10 to 945 MHz and
select frequencies to 1.4 GHz from an input
frequency of 10 to 710 MHz
Low jitter clock outputs w/jitter generation as low as
0.6 ps rms (50 kHz–80 MHz)
Integrated loop filter with selectable loop bandwidth
(30 kHz to 1.3 MHz)
Four clock inputs w/manual or automatically
controlled hitless switching
Five clock outputs with selectable signal format
(LVPECL, LVDS, CML, CMOS)
Support for ITU G.709 FEC ratios (255/238,
255/237, 255/236)
LOS alarm outputs
Digitally-controlled output phase adjust
I
2
C or SPI programmable settings
On-chip voltage regulator for 1.8 or 2.5 V ±10%
operation
Small size: 14 x 14 mm 100-pin TQFP
Pb-free, RoHS compliant
P
RELIMINARY
D
ATA
S
HEET
I
2
C/SPI Port
Clock Select
CKOUT2
CKIN1
CKOUT1
CKIN2
Control
÷ NC1
÷ NC2
CKIN3
CKIN4
CKOUT4
÷ NC4
CKOUT5
÷ NC5
VDD (1.8 or 2.5 V)
GND
÷ N32
÷ N31
DSPLL
÷ N2
CKOUT3
÷ NC3
÷ N33
÷ N34
Device Interrupt
LOS Alarms
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI5367B-B-GQR 制造商:Silicon Laboratories Inc 功能描述:
Si5367B-C-GQ 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 uP-PROGRAMMABE CLK MULT 10 MHZ-808 MHZ RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SI5367B-C-GQR 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 mP-Program Precision Clk Multiplier 4/5 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
Si5367C-B-GQ 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 uP-PROGRAMMABE CLK MULT 10 MHZ-346 MHZ RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SI5367C-B-GQR 制造商:Silicon Laboratories Inc 功能描述: