參數(shù)資料
型號(hào): SI5338B-A-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 7/44頁(yè)
文件大小: 0K
描述: IC CLK GEN QUAD 350MHZ 24-QFN
標(biāo)準(zhǔn)包裝: 490
系列: MultiSynth™
類型: 時(shí)鐘發(fā)生器
PLL:
輸入: CML,HCSL,HSCL,LVDS,LVPECL,晶體
輸出: CMOS,HCSL. HSTL. LVDS. LVPECL. SSTL
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 是/是
頻率 - 最大: 350MHz
除法器/乘法器: 是/是
電源電壓: 1.71 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN(4x4)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 628 (CN2011-ZH PDF)
配用: 336-1747-ND - KIT PROG FIELD SI5338/4/0
336-1556-ND - BOARD EVALUATION SI5338
其它名稱: 336-1554-5
Si5338
Rev. 1.3
15
Table 14. Typical Phase Noise Performance
Offset Frequency
25 MHz XTAL
to 156.25 MHz
27 MHz Ref In
to 148.3517 MHz
19.44 MHz Ref In
to 155.52 MHz
Units
100 Hz
–90
–87
–110
dBc/Hz
1 kHz
–120
–117
–116
dBc/Hz
10 kHz
–126
–123
dBc/Hz
100 kHz
–132
–130
–128
dBc/Hz
1 MHz
–132
–128
dBc/Hz
10 MHz
–145
dBc/Hz
Table 15. I2C Specifications (SCL,SDA)1
Parameter
Symbol
Test Condition
Standard Mode
Fast Mode
Unit
Min
Max
Min
Max
LOW Level
Input Voltage
VILI2C
–0.5
0.3 x VDDI2
C
–0.5
0.3 x VDDI2C
V
HIGH Level
Input Voltage
VIHI2C
0.7 x VDDI2
C
3.63
0.7 x VDDI2C
3.63
V
Hysteresis of
Schmitt Trigger
Inputs
VHYS
N/A
0.1
V
LOW Level Out-
put Voltage
(open drain or
open collector)
at 3 mA Sink
Current
VOLI2C
VDDI2C
2 = 2.5/3.3 V
0
0.4
0
0.4
V
VDDI2C
2 = 1.8 V
N/A
0
0.2 x VDDI2C
V
Input Current
II2C
–10
10
–10
10
A
Capacitance for
each I/O Pin
CI2C
VIN = –0.1 to VDDI2C
—4
4
pF
I2C Bus Time-
out
Timeout Enabled
25
35
25
35
ms
Data Rate
Standard Mode
100
400
kbps
Notes:
1. Refer to NXP’s UM10204 I2C-bus specification and user manual, Revision 03, for further details:
2. I2C pullup voltages (VDDI2C) of 1.71 to 3.63 V are supported. Must write register 27[7] = 1 if the I2C bus voltage is less
than 2.5 V to maintain compatibility with the I2C bus standard.
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