Si5319
Rev. 1.0
15
Figure 4. Si5319 Typical Application Circuit (I2C Control Mode)
Figure 5. Si5319 Typical Application Circuit (SPI Control Mode)
S i5 319
IN T _C B
LO L
RS T
S erial D ata
Serial C lock
Reset
Interrupt/C K IN Invalid Indicator
P LL Loss of Lock Indicator
SD A
SC L
I2C Interface
Serial P ort A ddress
A [2:0]
CM ODE
C ontrol M ode (L)
X tal/C lock S elect
CS
1. A ssum es differential LVPE C L term ination (3.3 V ) on clock inputs.
2. D enotes tri-level input pins w ith states designated as L (ground), M (V D D /2), and H (V D D ).
N o tes:
XA
XB
Refclk+
O ption 2:
0.1 F
Refclk–
0.1 F
RA T E[1:0]2
Crystal/Ref Clk Rate
VDD
15 k
15 k
XA
XB
C rystal 114.285 M H z
O ption 1:
1 F
VD
D
GND
Ferrite
Bead
System
Pow er
Supply
C 1
C 2
C 3
C 4
0.1 F
GN
D
P
A
D
130
130
82
82
V DD = 3.3 V
CK IN +
CK IN –
CK OUT +
CK OUT –
100
0.1 F
+
–
0.1 F
Si5319
RST
Reset
CMODE
Control Mode (H)
INT_CB
SPI Interface
LOL
Interrupt/CLKIN Invalid Indicator
PLL Loss of Lock Indicator
Serial Data Out
Serial Data In
SDO
SDI
Serial Clock
SCLK
Slave Select
SS
Xtal/Clock Select
CS
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
Notes:
XA
XB
Refclk+
Option 2:
0.1 F
Refclk–
RATE[1:0]2
Crystal/Ref Clk Rate
VDD
15 k
15 k
XA
XB
Crystal 114.285 MHz
Option 1:
CKIN+
CKIN–
130
130
82
82
VDD = 3.3 V
VD
D
GN
D
GN
D
P
A
D
Ferrite
Bead
System
Power
Supply
C1
C2
C3
C4
0.1 F
1 F
CKOUT+
CKOUT–
100
0.1 F
+
–