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參數資料
| 型號： | SI5013-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數： | 17/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR SI5013 |
| 標準包裝： | 1 |
| 主要目的： | 計時，時鐘和數據恢復（CDR） |
| 已用 IC / 零件： | SI5013 |
| 已供物品： | 板 |
| 其它名稱： | 336-1123 |
Si5013
24
Rev. 1.6
DOCUMENT CHANGE LIST
Revision 0.2 to Revision 1.0
Updated values: Supply Current
Updated values: Power Dissipation
Updated values: Common Mode Input Voltage
(REFCLK)
Updated values: Output Common Mode Voltage
Updated values: Output Clock Rise Time
Updated values: Output Clock Fall Time
Updated values: Clock to Data Delay tCf-D
Updated values: Jitter Tolerance (OC-12)
Updated values: RMS Jitter Generation
Updated values: Peak-to-Peak Jitter Generation
Updated values: Acquisition Time (reference clock
applied)
Updated values: Acquisition Time
(reference-less operation)
Updated values: Freq Difference at which Receive PLL
goes out of Lock
Updated values: Freq Difference at which Receive PLL
goes into Lock
Removed “Hysteresis Dependency” Figure.
13.
Corrected error: Table 8 on page 19—changed
description for LOS_LVL from “LOS is disabled when
the voltage applied is less than 500 mV” to “LOS is
disabled when the voltage applied is less than
1.0 V.”
Revision 1.0 to Revision 1.1
Corrected “Revision 0.2 to Revision 1.0” Change
List.
Updated values: Jitter Tolerance (OC-3)
Revision 1.1 to Revision 1.2
Updated Table 2 on page 7.
Added “Output Common Mode Voltage (DOUT)” with
updated values.
Added “Output Common Mode Voltage (CLKOUT)” with
updated values.
Updated Table 3 on page 8.
Added “Output Clock Duty Cycle—OC-12/3.”
Added “Loss-of-Signal Response Time” with updated
values.
Updated Table 8 on page 19.
Changed “clock input” to “DIN inputs” for Loss Of Signal
Changed dimension A.
Changed dimension E2.
Revision 1.2 to Revision 1.3
Revision 1.3 to Revision 1.4
Updated " Features" on page 1.
Updated supply current values.
Updated power dissipation values.
Updated differential output voltage swing
(DOUT and CLKOUT).
Added output clock rate values.
Updated duty cycle values.
Updated slice accuracy values.
Updated jitter tolerance values (OC-12 mode).
Updated acquisition time values.
Updated reference clocks range.
Updated reference clocks tolerance.
Added 1% to Rext.
Removed OC-24 note.
Added no-hysteresis text to BER_LVL.
Updated "6. Ordering Guide" on page 22.
Added “X” to part number.
Revision 1.4 to Revision 1.5
Updated Table 2 on page 7.
Added limits for VICM.
Updated VOD.
Updated Table 3 on page 8.
Updated TCr-D.
Updated TCf-D.
Revised SLICE specification.
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相關代理商/技術參數 |
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| SI5013-X-GM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER |
| SI-50141-F | 功能描述:CONN MAGJACK 1PT 10/100BTX G/Y RoHS:是 類別:連接器，互連式 >> 模塊 - 帶磁性元件的插座 系列:MagJack® ST SI-50000 標準包裝:63 系列:Mag45 連接器類型:RJ45 端口數:1 行數:1 安裝類型:面板安裝，通孔，直角 速度:10/100 Base-T 板上方高度:0.555"（14.10mm） LED 顏色:綠 - 綠 每一插座芯體的數目:5 屏蔽:屏蔽 翼片方向:上 特點:板鎖 包裝:托盤 |
| SI-50142 | 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50142 |
| SI-50143 | 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50143 |
| SI-50144 | 制造商:BEL 制造商全稱:Bel Fuse Inc. 功能描述:SI-50144 |
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