
Electrical Characteristics
Parameter
Symbol
min
typ
max
Unit
Conditions
Ratings
Output voltage
Dropout voltage
Input voltage
Quiescent circuit current
(Tj=25oC, V
IN
=14V, I
O
=0.3A unless otherwise specified)
V
IN
I
O
= 0A
DLY terminal open
V
O
= 5.0V (typ
)
V
O
th
= V
O
thH – V
O
thL
V
O
=
5.0V
(
typ)
, R
L
=
510
V
O
=
5.0V
(
typ)
, R
L
=
510
V
O
=
5.0V
(
typ)
,
shorted across V
RST
and GND
V
RST
=
0.5V
f
= 100 to 120Hz
6
30
V
4.90
5.00
5.10
V
0.5
V
54
8.5
2.9
35
V
O
0.92
100
dB
12
mA
0.71
A
2.7
25
V
O
0.90
50
V
O
–
0.1
1.3
V
45
3.1
V
O
0.94
150
0.5
–10
μ
A
V
mV
V
V
mA
mA
V
O
V
DIF
R
REJ
Iq
I
S
V
DLY
th
I
DLY
V
o
thL
V
o
th
V
RSTH
V
RSTL
I
RSTH
I
RSTL
Ripple rejection
Overcurrent protection starting
current
Reset threshold voltage level
Reset threshold voltage hysteresis
H-level output voltage
L-level output voltage
Source current when
H-level
Sink current when L-level
Threshold voltage
Source current
*
3
5
*
2
*
1
*
4
Parameter
Symbol
Unit
Conditions
Ratings
Absolute Maximum Ratings
(Ta=25oC)
DC input voltage
Output current
Power Dissipation
J unction temperature
Operating temperature
Storage temperature
J unction to case thermal resistance
J unction to ambient-air thermal
resistance
V
IN
I
O
P
D1
P
D2
Tj
T
OP
Tstg
j
-c
j
-a
V
With infinite heatsink
Stand-alone without heatsink
Stand-alone without heatsink
A
W
W
oC
oC
oC
oC/W
oC/W
35
0.7
22
1.8
–40 to +150
–40 to +105
–40 to +150
5.5
66.7
DLY
terminal
V
RST
terminal
Equivalent Circuit Diagram
Standard Circuit Diagram
Reset Signal Output Timing Chart
External Dimensions
(unit: mm)
Features
G
5-terminal IC regulator with reset function; 0.7A output current
G
Voltage accuracy of
±
2%
G
Low Dropout voltage 0.5V at I
O
0.3A
G
Built-in constant current type overcurrent, overvoltage and thermal protection circuits
G
TO-220 equivalent full-mold miniature package
OCP
D
DET
RESET
ERR
REF1
REF2
T
O
V
IN
V
OUT
V
RST
1
5
2
4DLY
1
GND
Input voltage
Output voltage
Reset signal output
Voltage across
delay capacitor
V
O
+ V
DIF
V
OthH
V
Oth
V
OthL
V
DLY
V
RSTH
V
RSTL
t
DLY
[Calculating t
DLY
]
Reset signal delay time tDLY is calculated from the following formula:
t
DLY
V
DLYth
V
O
V
IN
GND
GND
0 (V)
0 (V)
t
DLY
=
I
DLY
C
DLY
V
DLYth
+ 0.2
* I
DLY
is the current flowing from DLY terminal
shown in the Standard Circuit Diagram.
1. V
IN
2. V
3. GND
4. DLY
5. V
OUT
(Forming No. 1101)
SI-3011S
C
1
V
IN
V
OUT
R
L
V
RST
D
2
C
DLY
GND
1
5
2
4
3
DLY
+
C
O
+
*
2
D
1
*
2
*
1
Power
supply
L
Reset signal
a
b
1
2
3
4
5
10.0
±
0.2
3.2
±
0.2
0
4
±
0
7
±
0
1
±
0
0.95
±
0.15
0.85
0.2
+
---
0.1
P1.7
±
0.7
4 = 6.8
±
0.7
4.2
±
0.2
2.8
±
0.2
2.6
±
0.1
3.9
±
0.7
8.2
±
0.7
0.45
0.1
+-
0.2
(
5
±
0
(
(
(
(4.3)
a: Type No.
b: Lot No.
10
Dropper Type Regulator with Reset Function SI-3011S
Notes:
*1. Since P
D
(max)
= (V
IN
–V
O
) I
O
= 22 (W), V
IN
(max)
and I
O
(max)
may be limited depending on operating
conditions. Refer to the Ta—P
D
curve to compute the corresponding values.
*2. Refer to the dropout voltage.
*3. I
S
rating shall be the point at which the output voltage V
O
(V
IN
= 14V, Io = 0.3A) drops to –5%.
*4. V
O
thL is the Vo threshold voltage at which the V
RST
terminal turns from high to low.
*5. V
O
thH is the Vo threshold voltage at which the V
RST
terminal turns from low to high. VothH may be
given by V
O
thL plus V
O
th.
*6. Reset signal output terminal V
RST
is pulled up in the IC [pull-up resistance 3k
(typ)], allowing direct
connection with a logic circuit.
Terminal connections
Co :
*1 C
1
:
Output capacitor (47 to 100
μ
F, 50V)
Anti-oscillation capacitors (C
1
: approx. 47
μ
F).
This must be connected to terminals 1 (V
IN
) and 3 (GND)
via the shortest possible routing. An approximately
0.33
μ
F capacitor with good high frequency
characteristics must be connected in parallel in case of
inductive input lines or long-distance wiring. Tantalum
capacitors are recommended for C
1
and C
0
, especially
at low temperatures.
*
2
D
1,
D
2
: Protection diode.
Required as protection against reverse biasing between
input and output.
(Recommended diode: Sanken EU2Z.)
*
1
*
6