參數(shù)資料
型號(hào): SG6846CD
廠商: Electronic Theatre Controls, Inc.
英文描述: Highly-Integrated Green-Mode PWM Controller
中文描述: 高度集成的綠色模式PWM控制器
文件頁數(shù): 3/14頁
文件大?。?/td> 3217K
代理商: SG6846CD
Product Specification
Highly-Integrated Green-Mode PWM Controller
SG6846
PIN DESCRIPTIONS
System General Corp. - 3 - www.sg.com.tw
Version 1.0(IAO33.0008.B0) Sep. 30, 2004
Pin No. Symbol
Function
Description
1
GND
Ground
Ground.
The signal from the external compensation circuit is fed into this pin. This FB pin and the
current-sense signal from Pin 6 determine the PWM duty cycle.
2
FB
Feedback
3
VIN
Line-voltage
Detection
Line-voltage detection. The line-voltage detection is used for brownout protection with
hysteresis. Constant output power limit over universal AC input range is also achieved using
this VIN signal. It is suggested to add low pass filter to filter out line ripple on bulk capacitor.
4
RI
Reference
Setting
A resistor from the RI pin to ground will generate a reference current source inside SG6846.
This determines the switching frequency. Increasing the resistance will reduce the switching
frequency. Using a 26k
resistor Ri results in a 65kHz switching frequency.
For over-temperature protection. An external NTC thermistor is connected from this pin to
GND pin. The impedance of the NTC will decrease at high temperatures. Once the voltage
of the RT pin drops below a threshold, PWM output will be disabled.
Current sense. The sensed voltage is used for peak-current-mode control and
cycle-by-cycle current limiting. If the switching current is higher than 2/3 of the peak-current
threshold for longer than 96ms, over-current protection will be activated. This two-level OCP
feature is especially suitable for SMPS with surge current output.
Power Supply. The internal protection circuit will disable PWM output when VDD over
voltage.
The totem-pole output driver for the power MOSFET. A soft driving waveform is
implemented for improved EMI.
5
RT
Temperature
Detection
6
SENSE
Current Sense
7
VDD
Power Supply
8
GATE
Driver Output
BLOCK DIAGRAM (OTP LATCH VERSION)
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