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參數(shù)資料
| 型號(hào)： | SG3527A |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Regulating Pulse Width Modulators |
| 中文描述： | 調(diào)節(jié)脈沖寬度調(diào)制器 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 205K |
| 代理商： | SG3527A |
SG3525A SG3527A
6
MOTOROLA ANALOG IC DEVICE DATA
Figure 7. SG3525A Output Circuit
(1/2 Circuit Shown)
Figure 8. Single–Ended Supply
Figure 9. Push–Pull Configuration
Figure 10. Driving Power FETS
Low power transformers can be driven directly by the SG3525A.
Automatic reset occurs during deadtime, when both ends of the
primary winding are switched to ground.
Q1
R1
R2
13
To Output Filter
11
14
12
VC
SG3525A
A
B
Gnd
+Vsupply
For single–ended supplies, the driver outputs are grounded.
The VC terminal is switched to ground by the totem–pole
source transistors on alternate oscillator cycles.
In conventional push–pull bipolar designs, forward base drive is
controlled by R1–R3. Rapid turn–off times for the power
devices are achieved with speed–up capacitors C1 and C2.
VC
SG3525A
A
B
Gnd
+Vsupply
R1
13
12
11
14
R3
C2
C1
Q1
Q2
T1
R2
The low source impedance of the output drivers provides
rapid charging of power FET input capacitance while
minimizing external components.
+Vsupply
VC
SG3525A
A
B
Gnd
11
14
Q1
Q2
T1
R1
13
12
VC
SG3525A
A
B
Gnd
13
11
14
12
+Vsupply
T1
Q1
Q2
R2
R1
T2
C1
C2
Figure 11. Driving Transformers in a
Half–Bridge Configuration
Q3
VCC
Q5
Q4
Q7
Q9
Q10
13
VC
Vref
Q1
Q2
Q6 Omitted
in SG3527A
5.0k
10k
10k
2.0k
Q11
Q6
Q8
5.0k
11, 14
Output
Clock
F/F
PWM
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PDF描述 |
|---|---|
| SG3527AJ | Regulating Pulse Width Modulators |
| SG3527AN | Regulating Pulse Width Modulators |
| SG3561A | POWER FACTOR CONTROLLER |
| SG3561ADM | POWER FACTOR CONTROLLER |
| SG3561AM | POWER FACTOR CONTROLLER |
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