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參數(shù)資料
| 型號(hào)： | SFH6701 |
| 廠商： | VISHAY INTERTECHNOLOGY INC |
| 元件分類： | 光電耦合器 |
| 英文描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 5 Mbps |
| 封裝： | DIP-8 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 466K |
| 代理商： | SFH6701 |
Document Number: 83683
www.vishay.com
Revision 17-August-01
2–297
Table 3. Switching Times (3)
0°C≤ TA≤85°C; 4.5 V≤VCC≤15 V; 1.6 mA≤IFon≤5.0 mA; 2.0≤VEH≤15 V (SFH6700/19);
0
≤ VEL≤0.8 V (SFH6700/19); 0 mA≤IFoff≤0.1 mA
Typical values: TA=25°C; VCC=5.0 V; IFon=3.0 mA unless otherwise specied
Switching Times (3)
Typical values: TA=25°C, VCC=5.0 V; IFon=3.0 mA, RL=390 , unless otherwise specied
Common Mode Transient Immunity TA=25°C, VCC=5.0 V
(4)
3. A 0.1
F bypass capacitor connected between pins 5 and 8 must be used.
4. CMH is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic high level (VO>2.0 V).
CML is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic low level (VO<0.8 V).
Parameter, SFH6700/01/02/11/12/19
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Propagation Delay Time to Logic Low Output Level
tPHL
—
120
—
ns
Without Peaking Capacitor
—
115
300
With Peaking Capacitor
Propagation Delay Time to Logic Low Output Level
tPLH
—
125
—
ns
Without Peaking Capacitor
—
90
300
With Peaking Capacitor
Output Enable Time to Logic High (SFH6700/19)
tPZH
—
20
—
ns
—
Output Enable Time to Logic Low (SFH6700/19)
tPZL
—
25
—
ns
—
Output Disable Time from Logic High (SFH6700/19)
tPHZ
—
50
—
ns
—
Output Disable Time from Logic Low (SFH6700/19)
tPLZ
—
50
—
ns
—
Output Rise Time
tr
—
40
—
ns
10% to 90%
Output Fall Time
tf
—
10
—
ns
90% to 10%
Parameter, SFH6705
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Propagation Delay Time to Logic Low Output Level
tPHL
—
115
—
ns
Without Peaking Capacitor
—
105
300
With Peaking Capacitor
Propagation Delay Time to Logic Low Output Level
tPLH
—
125
—
ns
Without Peaking Capacitor
—
90
300
With Peaking Capacitor
Output Rise Time
tr
—
25
—
ns
10% to 90%
Output Fall Time
tf
—
4
—
ns
90% to 10%
Parameter
Device
Symbol
Min.
Unit
Test Condition
Logic High Common Mode Transient Immunity
SFH6700/01/02/05
| CMH |
(4)
1000
V/
s| VCM |=50 V, IF=1.6 mA
SFH6711/12/19
2500
V/
s| VCM |=400 V, IF=1.6 mA
Logic Low Common Mode Transient Immunity
SFH6700/01/02/05
| CML |
(4)
1000
V/
s| VCM |=50 V, IF=0
SFH6711/12/19
2500
V/
s| VCM |=400 V, IF=0
Figure 2. Permissible Total Power Dissipation vs.
Temperature
Emitter
Detector
150
120
100
75
50
25
0
–60
100
80
60
40
20
0
–20
–40
T
A - Temperature - °C
P
tot
-
P
o
wer
dissipation
-
mW
Figure 3. Typical Input Diode Forward Current vs. Forward
Voltage
0.010
0.100
1.000
10.000
1.3
1.4
1.5
1.6
1.7
V
F - Forward Voltage
I F-
Forward
Current
-
mA
TA=25°C
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