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    參數(shù)資料
    型號(hào)： SE370C712BFZT
    元件分類： 8位微控制器
    英文描述： 8-BIT MICROCONTROLLER
    中文描述： 8位微控制器
    文件頁(yè)數(shù)： 8/48頁(yè)
    文件大小： 711K
    代理商： SE370C712BFZT
    TMS370Cx36
    8-BIT MICROCONTROLLER
    SPNS039B – JANUARY 1996 – REVISED FEBRUARY 1997
    8
    POST OFFICE BOX 1443
    HOUSTON, TEXAS 77251–1443
    central processing unit (CPU) (continued)
    256-Byte RAM
    Reserved
    Peripheral File
    Reserved
    128-Byte PACT Dual-Port RAM
    7FC0h–7FDFh
    PACT Interrupt 1-18
    7FEEh–7FF5h
    Reserved
    7FECh–7FEDh
    Interrupt 1
    Reset
    1020h–102Fh
    Digital Port Control
    Vectors
    ADC1
    Reserved
    Serial Peripheral Interface
    Reserved
    7FFCh–7FFDh
    7FFEh–7FFFh
    0000h
    0100h
    017Fh
    00FFh
    0200h
    02FFh
    0300h
    0FFFh
    1000h
    10BFh
    10C0h
    1EFFh
    1F00h
    1FFFh
    2000h
    3FFFh
    4000h
    7F9Bh
    7F9Ch
    FFFFh
    Reserved means that the address space is reserved for future expansion.
    01FFh
    Interrupts and Reset Vectors;
    Trap and PACT Vectors
    7FFFh
    8000h
    7FF6h–7FF7h
    7FF8h–7FFBh
    Peripheral File Control Registers
    0180h
    1010h–101Fh
    1050h–105Fh
    System Control
    1030h–103Fh
    1040h–104Fh
    ADC1 Peripheral Control
    Trap 15–0
    Reserved
    256-Byte PACT Standby RAM
    Reserved
    256-Byte Data EEPROM
    Reserved
    16K-Byte ROM/EPROM
    7F9Ch–7FBFh
    7FE0h–7FEBh
    1000h–100Fh
    1060h–106Fh
    1070h–107Fh
    Reserved
    SPI Peripheral Control
    PACT Peripheral Control
    Reserved
    Reserved
    Figure 3. TMS370Cx36 Memory Map
    RAM/register file (RF)
    Locations within the RAM address space can serve as the RF, general-purpose read/write memory, program
    memory, or the stack instructions. The TMS370Cx36 devices contain 256 bytes of internal RAM,
    memory-mapped beginning at location 0000h (R0) and continuing through location 00FFh (R255) which is
    shown in Figure 1.
    The first two registers, R0 and R1, are also called register A and B, respectively. Some instructions implicitly
    use register A or B; for example, the instruction LDSP (load SP) assumes that the value to be loaded into the
    stack pointer is contained in register B. Registers A and B are the only registers cleared on reset.
    dual-port RAM
    The upper 128 bytes of the register files can be used by the PACT module to contain commands and definitions
    as well as timer values. Any RAM not used by PACT can be used as an additional CPU register or as
    general-purpose memory.
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