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參數資料
| 型號： | SDM40E20LS |
| 廠商： | Diodes Inc. |
| 英文描述： | DUAL SURFACE MOUNT SCHOTTKY BARRIER DIODE |
| 中文描述： | 雙表面貼裝肖特基二極管 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 61K |
| 代理商： | SDM40E20LS |
DS30298 Rev. 2 - 2
1 of 3
SDM40E20LS
SDM40E20LS
DUAL SURFACE MOUNT SCHOTTKY BARRIER DIODE
Features
Single phase, half wave, 60Hz, resistive or inductive load.
For capacitive load, derate current by 20%.
Maximum Ratings
@ T
A
= 25 C unless otherwise specified
Characteristic
Symbol
V
RRM
V
RWM
V
R
V
R(RMS)
I
FM
SDM40E20LS
Unit
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
RMS Reverse Voltage
Forward Continuous Current (Note 1)
Non-Repetitive Peak Forward Surge Current
8.3ms single half sine-wave superimposed on rated load
(JEDEC Method)
Power Dissipation (Note 1)
Typical Thermal Resistance Junction to Ambient (Note 1)
Power Dissipation (Note 2)
Typical Thermal Resistance Junction to Ambient (Note 2)
Operating and Storage Temperature Range
20
V
14
0.4
V
A
I
FSM
2
A
P
d
R
JA
P
d
R
JA
T
j,
T
STG
225
444
300
333
mW
C/W
mW
C/W
C
-55 to +125
A
E
J
L
TOP VIEW
M
B
C
H
G
D
K
Very Low Forward Voltage Drop
Guard Ring Construction for
Transient Protection
High Conductance
Case: SOT-23, Plastic
Case material - UL Flammability Rating
Classification 94V-0
Moisture sensitivity: Level 1 per J-STD-020A
Polarity: See Diagram
Leads: Solderable per MIL-STD-202,
Method 208
Marking: Date Code and Type Code
Type Code: KSW
Weight: 0.004 grams (approx.)
Ordering Information: See Page 3
Mechanical Data
Electrical Characteristics
@ T
A
= 25 C unless otherwise specified
Characteristic
Symbol
V
(BR)R
Min
Typ
Max
Unit
V
Test Conditions
I
R
= 0.5mA
I
F
= 0.1A
I
F
= 0.5A
V
R
= 10V
V
R
= 20V
f = 1MHz, V
r
= 0VDC
Reverse Breakdown Voltage (Note 3)
20
Forward Voltage Drop (Note 3)
V
F
0.310
0.430
100
250
V
Leakage Current (Note 3)
I
R
A
Total Capacitance
C
T
170
pF
T
C
U
D
O
R
P
W
E
N
Notes:
which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
2. Device mounted on Alumina PCB, 0.4 inch x 0.3 inch x 0.024 inch; pad layout as shown on Diodes Inc. suggested pad layout
document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
3. Short duration test pulse used to minimize self-heating effect.
1. Device mounted on FR-5 1.0 x 0.75 x 0.062 inch PCB pad layout as shown on Diodes Inc. suggested pad layout AP02001,
SOT-23
Min
Dim
A
B
C
D
E
G
H
J
K
L
M
Max
0.37
0.51
1.20
1.40
2.30
2.50
0.89
1.03
0.45
0.60
1.78
2.05
2.80
3.00
0.013
0.10
0.903
1.10
0.45
0.61
0.85
0.80
0
8
All Dimensions in mm
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