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    參數(shù)資料
    型號: SDC-14604-152S
    廠商: DATA DEVICE CORP
    元件分類: 位置變換器
    英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA28
    封裝: DDIP-28
    文件頁數(shù): 4/6頁
    文件大?。?/td> 237K
    代理商: SDC-14604-152S
    NO FALSE 180° HANGUP
    This feature eliminates the “false 180° reading” during instanta-
    neous 180° step changes; this condition most often occurs when
    the input is “electronically switched” from a digital-to-synchro
    converter. If the “MSB” (or 180° bit) is “toggled” on and off, a con-
    verter without the “false 180° hangup” feature may fail to
    respond.
    The condition is artificial, as a “real” synchro or resolver can not
    change its output 180° instantaneously. The condition is most
    often noticed during wraparound verification tests, simulations,
    or troubleshooting.
    4
    1.48 (MAX)
    (37.59)
    PIN 1 DENOTED BY
    CONTRASTING
    COLORED BEAD
    128
    1.300
    (33.02)
    0.100 (TYP)
    (2.54)
    0.018±0.002 DIA (TYP)
    (0.46 ±0.05)
    0.250 ±0.010 (TYP)
    (6.35 ±0.25)
    0.200 (MAX)
    (5.08)
    PIN NUMBERS ARE
    FOR REF. ONLY
    15
    14
    0.78 (MAX)
    (19.81)
    0.600
    (15.24)
    Dimensions in inches (mm).
    BOTTOM
    VIEW
    SIDE
    VIEW
    ,
    ENABLE
    150 ns MAX
    DATA
    VALID
    100 ns MAX
    HIGH Z
    ,,,,,,
    DATA
    VALID
    500 ns MAX
    INHIBIT
    FIGURE 3. INHIBIT TIMING
    FIGURE 4. ENABLE TIMING
    FIGURE 5. SDC-14600/05 MECHANICAL OUTLINE
    TABLE 2. PINOUT (28 PIN)*
    1
    A GND(D)
    S1A(R)
    S1A(S)
    28 +REF
    (+Reference Input)
    2
    +COS(D)
    S2A(R)
    S2A(S)
    27 -REF
    (-Reference Input)
    3
    +SIN(D)
    S3A(R)
    S3A(S)
    26 -5 V
    (Power Supply)
    4
    N.C.
    S4A(R)
    N.C.
    25 VEL A
    (Velocity Output)
    5
    Bit 1(MSB)
    /Bit 9
    24 EM A
    (Enable MSBs)
    6
    Bit 2
    /Bit 10
    23 EL A
    (Enable LSBs)
    7
    Bit 3
    /Bit 11
    22 GND
    (Ground)
    8
    Bit 4
    /Bit 12
    21 +5 V
    (Power Supply)
    9
    Bit 5
    /Bit 13
    20 EL B
    (Enable LSBs)
    10 Bit 6
    /Bit 14
    19 EM B
    (Enable MSBs)
    11 Bit 7
    /Bit 15**
    18
    N.C.
    S4B(R)
    N.C.
    12 Bit 8
    /Bit 16**
    17
    +SIN(D)
    S3B(R)
    S3B(S)
    13 INH
    (Inhibit)
    16
    -COS(D)
    S2B(R)
    S2B(S)
    14 VEL B
    (Velocity Output)
    15
    A GND(D)
    S1B(R)
    S1B(S)
    * Note: (S) = Synchro; (R) = Resolver; (D) = 2 V Resolver Direct
    ** Note: SDC-14605 Series only
    相關PDF資料
    PDF描述
    SDC-14604-162S SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA28
    SD-14590F1-155S SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36
    SD-14623DX-124K SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CQIP54
    SD-14621FS-415Q SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP54
    SDC-14604-232S SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DMA28
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