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參數(shù)資料
| 型號： | SDC-14580-412K |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 位置變換器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, DIP36 |
| 封裝： | DDIP-36 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大?。?/td> | 202K |
| 代理商： | SDC-14580-412K |
6
Data Device Corporation
www.ddc-web.com
SDC-14580
H-05/04-0
also change to logic 0 for an over-velocity condition, because the
converter loop cannot maintain input-output or if the converter
malfunctions where it cannot maintain the loop at a null. BIT will
also be set if a Loss-of-Signal (LOS) and/or a Loss-of-Reference
(LOR) occurs.
PROGRAMMABLE RESOLUTION (A, PIN 35; B, PIN 36)
Resolution is controlled by two logic inputs, A and B (see TABLE
3). The resolution can be changed during converter operation so
the appropriate resolution and velocity dynamics can be
changed as needed. To insure that a race condition does not
exist between counting and changing the resolution, inputs A
and B are latched internally on the trailing edge of CB (see
FIGURE 2). For more information refer to the Accuracy and
Resolution section.
Note: All unused digital output data bits are at logic 0.
SPECIAL DESIGN CONSIDERATIONS
Due to its high dynamic capability in 10- and 12-bit mode, the
SDC-14580 series of converters has a potential for a spin-
around condition. A spin-around condition occurs when the con-
verter does not track and the angular input and the digital output
;;;
;;
A,B
0
s MIN
CB
0.1
s MIN
FIGURE 2. RESOLUTION CONTROL TIMING DIAGRAM
30
90
150
210
270
330
360
θ
(DEGREES)
CCW
In
Phase
with
RL-RH
of
Converter
and
R2-R1
of
CX.
0
S1-S3 = V
SIN
θ
MAX
S3-S2 = V
SIN(
θ + 120°)
MAX
S2-S1 = V
SIN(
θ + 240°)
MAX
- V
MAX
+ V
MAX
30
90
150
210
270
330
360
θ
(DEGREES)
CCW
In
Phase
with
RH-RL
of
Converter
and
R2-R4
of
RX.
0
S2-S4 = V
COS
θ
MAX
S1-S3 = –V
SIN(
θ)
MAX
- V
MAX
+ V
MAX
Standard Synchro Control Transmitter (CX) Outputs as a Function of CCW Rotation
From Electrical Zero (EZ).
FIGURE 3. SYNCHRO AND RESOLVER SIGNALS
Standard Resolver Control Transmitter (RX) Outputs as a Function of CCW
Rotation From Electrical Zero (EZ) With R2-R4 Excited.
TABLE 3. RESOLUTION CONTROL
B
(PIN 36)
A
(PIN 35)
RESOLUTION
0
1
0
1
0
1
10 Bit
12 Bit
14 Bit
16 Bit
continuously counts (spins) from 0° to 359.999°. An indication of
a spin-around condition is the digital output changing as the syn-
chro or resolver input is stationary. During this time, the BIT may
flag an error condition and the velocity output may be at the max-
imum positive or negative output voltage. This potential problem
may happen at the time the unit is powered up, during a step, or
during instantaneous acceleration.
To avoid the spin-around condition when using the SDC-14580
converters in 10- or 12-bit mode, the following is required:
1) Power up the SDC-14580 converter in either the 14- or 16-
bit resolution mode and once it has settled change to the
10- or 12-bit mode.
2) Avoid large steps and instantaneous accelerations.
3) If the dynamics required by the system do not exceed the
dynamics of the SDC-14580 converter in the 14-bit mode,
then set the unit for the 14-bit mode and disregard the
additional LSBs.
INTERFACING - INPUT
SIGNAL INPUT OPTIONS
The SDC-14580 series offers three input options: synchro,
resolver, or direct resolver input. In a synchro or resolver, shaft
angle data is transmitted as the ratio of carrier amplitudes across
the input terminals. Synchro signals, which are of the form sin
θ
cos
ωt, sin(θ+120°)cosωt, and sin(θ+240°)cosωt are internally
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