參數(shù)資料
型號(hào)： SDA 4335
廠商： SIEMENS AG
元件分類： 通用總線功能
英文描述： PLL Frequency Synthesizer, IF Counter, 7 bit ADC, 7 & 4 bit DAC(包含IF計(jì)數(shù)器,7位ADC,7和4位DAC的用于汽車收音機(jī)的鎖相環(huán)頻率合成器)
中文描述： 鎖相環(huán)頻率合成器，中頻計(jì)數(shù)器，7位ADC，7
文件頁數(shù)： 7/33頁
文件大?。?/td> 676K
代理商： SDA 4335
Specification
SDA 4335
Semiconductor Group
7
21.5.99
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Pin No.
1
2
3
4
45
6
Symbol
IFC_SD
IF_AM
IF_FM
ADC_IN1
ADC_IN2
VCC
Function
PORT IF_Counter result output or Station-Detect input set by bus
IF_AM frequency input with counter request
IF_FM frequency input with counter request
PORT ADC1 Input
PORT ADC2 Input
Positive supply voltage (8...11V)
7
BUS_MODE
Data bus input: Bus-mode select
Must be Low for I
2
C-Bus-mode, must be High for 3 Wire -Bus-mode
8
SCL
Data bus input: Clock
Clock input of the serial control interface with Schmitt-Trigger input stage
9
SDA
Data bus input / output: Bidirectional Data-input/output
Data input of the serial control interface with Schmitt-Trigger input stage in write-mode. Data output in
read-mode.
10
BUS_ENA
Bus input: Enable
Enable input of the serial control interface with Schmitt-Trigger input stage. When EN=H the input signals
CLK and DA are disabled. When EN=L the serial control interface is enabled. The received data are
transferred to the registers with the positive edge of the EN_Q-signal.
11
12
13
14
15
16
17
18
19
20
21
VREFD5V
VREFD3V
GNDD
QUARTZ1
QUARTZ2
Reference voltage for analogue BiCMOS circuity
Reference voltage for digital CMOS circuity
Digital ground for CMOS circuity
Reference oscillator input1 / Crystal
Reference oscillator input2 / Crystal
PORT2_STEREO
Port2 open-drain output or Stereo detection input set by bus
XTAL_DIV6
PORT1
NC
NC
PDA
Output crystal frequency divided by 6
Port1 free programmable open-drain output
Not connected (replaced by Digtal Alignment SDA 4336)
Not connected (replaced by Digtal Alignment SDA 4336)
Phase detector output analogue (Tuningvoltage)
22
PD_0
Charge pump output
Phase detector tristate charge pump output for PD_Select=Low
23
PD_1
Charge pump output
Phase detector tristate charge pump output for PD_Select=High
24
25
26
27
28
GNDA
VCC1
VCO
Analoge Ground for bipolar circuity
25:Positive supply voltage for loop-amplifier of PLL (8...11V)
VCO frequency input. VCO input with sensitive preampifier for PLL
PORT_7BIT
Output port 7 bit DAC (Range: 0...
VREFD
5V)
PORT_4BIT
Output port 4 bit DAC (Range: 0...
VREFD
5V)
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