參數(shù)資料
型號(hào): SD60C31P
廠商: AUK Corp
英文描述: Handle, Padlocking RoHS Compliant: Yes
中文描述: CMOS單分量8位微機(jī)
文件頁(yè)數(shù): 10/12頁(yè)
文件大?。?/td> 278K
代理商: SD60C31P
KSI-W001-000
10
Timing Diagram(Continued)
SD60C31/P SD60C51/P
t
QVWX
ALE
PSEN
PORT0
PORT2
Figure 3. External Data Memory Write Cycle
WR
P2.0 - P2.7 OR A8 - A15 FROM DPH
A0 - A15 FROM PCH
t
WHLH
t
LLWL
t
WLWH
t
WHQX
t
LLAX
t
AVLL
t
AVWL
A0 - A7 FROM PCL
INSTR IN
DATA OUT
A0 - A7
FROM RI OR DPL
V
CC
- 0.5
0.45V
0.7V
CC
0.2V
SS
-0.1
t
CLCL
t
CLCX
t
CHCX
t
CLCH
t
CHCL
Figure 4. External Clock Drive
Figure 5. AC Testing Input/Output
0.2V
CC
+0.9
0.2V
CC
-0.1
V
CC
-0.5
0.45V
NOTE :
AC Inputs during testing are driven at V
CC
-0.5 for a logic
'1' and 0.45V for a logic '0'. Timing measurements are
made at V
IH
min for a logic '1' and V
IL
for a logic '0'
Figure 6. Float Waveform
NOTE :
For timing purposes, a port is no longer floating when a
100mV change from load voltage occurs, and begings
to float when a 100mV change from the loaded V
OH
/V
OL
level occurs. I
OH
/I
OL
20mA
TIMING
REFERENCE
POINTS
V
LOAD
V
LOAD
- 0.1V
V
LOAD+
+ 0.1V
V
OL
+ 0.1V
V
OH
- 0.1V
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