參數(shù)資料
    型號: SD-14597F3-582K
    廠商: DATA DEVICE CORP
    元件分類: 位置變換器
    英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDFP36
    封裝: CERAMIC, FP-36
    文件頁數(shù): 14/14頁
    文件大?。?/td> 416K
    代理商: SD-14597F3-582K
    INTERFACING - DYNAMIC PERFORMANCE
    A Type II servo loop (KV =
    ∞) and very high acceleration con-
    stants give the SD-14595/96/97 superior dynamic performance.
    If the power supply voltage is not the +5 V DC nominal value, the
    specified input rates will increase or decrease in proportion to
    the fractional change in voltage.
    TRANSFER FUNCTIONS
    The dynamic performance of the converter can be determined
    from its transfer function block diagram (FIGURE 15) and open
    and closed loop Bode plots (FIGURES 16 and 17). Values for the
    transfer function block can be obtained from TABLE 6.
    9
    ERROR PROCESSOR
    INPUT
    θ
    Open Loop Transfer function = Output
    WHERE:
    2
    A = A A
    1
    2
    VELOCITY
    OUT
    DIGITAL
    POSITION
    OUT
    (
    φ)
    VCO
    CT
    S
    A
    + 1
    1
    B
    S
    + 1
    10B
    H = 1
    2
    S
    A
    + 1
    B
    2
    S
    + 1
    10B
    +
    -
    e
    A
    2
    S
    -12
    db/oct
    4
    BA
    (BW)
    2A
    -6 db/oct
    10B
    ω (rad/sec)
    2A
    2 2 A
    ω (rad/sec)
    CLOSED LOOP BW (Hz) =
    2 A
    π
    FIGURE 17. CLOSED LOOP BODE PLOT
    FIGURE 16. OPEN LOOP BODE PLOT
    FIGURE 15. TRANSFER FUNCTION BLOCK DIAGRAM
    RESPONSE PARAMETERS
    As long as the converter maximum tracking rate is not exceed-
    ed, there will be no velocity lag in the converter output although
    momentary acceleration errors remain. If a step input occurs, as
    when the power is initially applied, the response will be critically
    damped. FIGURE 18 shows the response to a step input. After
    initial slewing at the maximum tracking rate of the converter,
    there is one overshoot (which is inherent in a Type II servo). The
    overshoot settling to a final value is a function of the small signal
    settling time.
    FASTER SETTLING TIME USING “BIT” TO REDUCE
    RESOLUTION
    Since the SD-14595 has higher precision in the 16-bit mode and
    faster settling in the 14-bit mode, the BIT output can be used to
    program the SD-14595 for lower resolution, allowing the con-
    verter to settle faster for step inputs. High precision, faster set-
    tling can therefore be obtained simultaneously and automatical-
    ly in one unit.
    CONNECTING THE SD-14595/96/97 TO A P.C. BOARD
    The SD-14595/96/97 can be attached to a printed circuit board
    using hand solder or wave soldering techniques. Limit exposure to
    300°C (572°F) max, for 10 seconds maximum.
    Since the SD-14595/96/97 converters contain a CMOS
    device, standard CMOS handling procedures should be fol-
    lowed.
    TABLE 6. DYNAMIC CHARACTERISTICS
    60 Hz UNIT
    400 Hz UNIT
    16-BIT
    PARAMETER
    UNIT
    14-BIT
    Input Freq.
    Tracking Rate
    Bandwidth, cl
    Ka
    A1
    A2
    A
    B
    acc-1 LSB lag
    Settling Time
    180° degree Step
    1.4° degree Step
    Hertz
    rps
    Hertz
    1/sec
    /sec
    ms
    47-1k
    1.5
    40
    7,680
    0.1
    40k
    88
    14.2
    169
    450
    100
    360-1k
    10
    320
    192,000
    1.2
    160,000
    440
    100
    4220
    100
    10
    16-BIT
    47-1k
    0.5
    20
    1920
    0.045
    40k
    44
    14.2
    11
    2000
    250
    OVERSHOOT
    SMALL SIGNAL
    SETTLING TIME
    MAX SLOPE EQUALS
    TRACKING RATE
    (SLEW RATE)
    θ2
    θ1
    SETTLING TIME
    FIGURE 18. RESPONSE TO STEP INPUT
    360-1k
    2.5
    110
    48,000
    0.3
    160,00
    0
    220
    100
    264
    400
    30
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