
2001 OSRAM Opto Semiconductors Inc. San Jose, CA
SCE5780/1/2/3/4/5/6
www.inneon.com/opto 408-456-4000
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178
7
August 1, 2001-18
Column Data Ranges
Figure 7. Block Diagram
Operation of the SCE578X
The SCE578X display consists of two CMOS ICs containing
control logic and drivers for eight 5 x 7 characters. The rst IC
controls characters 0 through 3 and the second IC controls
characters 4 through 7. These components are assembled in
a compact plastic package.
Individual LED dot addressability allows the user great free-
dom in creating special characters or mini-icons.
The serial data interface provides a highly efcient intercon-
nection between the display and the mother board. The
SCE578X requires a minimum three input lines as compared
to fourteen for an equivalent eight character parallel input part.
The on-board CMOS IC is the electronic heart of the display.
Each IC accepts serially formatted data, which is stored in the
internal RAM. The IC accepts data based on the character
address selected. The rst IC is selected when addressing
characters 0 through 3, the second IC is selected when
addressing characters 4 though 7, and both ICs are selected
when the Control Word is addressed.
Asynchronously the RAM is read by the character multiplexer
at a strobe rate that results in a icker free display. Figure 7
shows the three functional areas of the IC. These include:
the input serial data register and control logic, a 140 bit two
port RAM, and an internal multiplexer/display driver. The sec-
ond IC is identical except characters 4 though 7 are driven.
The following explains how to format the serial data to be
loaded into the display. The user supplies a string of bit
mapped decoded characters. The contents of this string is
shown in Figure 8a. Figure 8b shows that each character con-
sist of eight 8 bit words. The rst word encodes the display
Row 0
00H to 1FH
Row 1
00H to 1FH
Row 2
00H to 1FH
Row 3
00H to 1FH
Row 4
00H to 1FH
Row 5
00H to 1FH
Row 6
00H to 1FH
SD CLK
SData
Load
Serial Data
Register
Reset
CLKSEL
CLK I/O
Counter Chain
& Timing Logic
Oscillator
Y
Address
Decode
Display Multiplexer
Row Decoder
& Driver
0 1 23
4 5 6 7
140 Bit RAM
Write 28 X 5
Read 7 X 20
IC 1
IC 2
4 – 5 X 7
Characters
4 – 5 X 7
Characters
Column
Drivers
Digits
0 To 3
X Address Decode
3 Bit Address
Register
6 Bit Control
Word Register
Control Word Logic
VDIM Controls
MUX
Rate
The second IC has the same
function diagram as IC 1
IC 2 controls characters 4 To 7