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參數(shù)資料
| 型號： | SCAN92LV090VEH |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | HEATSINK TO-220 H=2.5 BLK W/PIN |
| 中文描述： | 9 LINE TRANSCEIVER, PQFP64 |
| 封裝： | LQFP-64 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 701K |
| 代理商： | SCAN92LV090VEH |
SCAN92LV090
9 Channel Bus LVDS Transceiver w/ Boundary SCAN
General Description
The SCAN92LV090A is one in a series of Bus LVDS trans-
ceivers designed specifically for the high speed, low power
proprietary backplane or cable interfaces. The device oper-
ates from a single 3.3V power supply and includes nine
differential line drivers and nine receivers. To minimize bus
loading, the driver outputs and receiver inputs are internally
connected. The separate I/O of the logic side allows for loop
back support. The device also features a flow through pin out
which allows easy PCB routing for short stubs between its
pins and the connector.
The driver translates 3V TTL levels (single-ended) to differ-
ential Bus LVDS (BLVDS) output levels. This allows for high
speed operation, while consuming minimal power with re-
duced EMI. In addition, the differential signaling provides
common mode noise rejection of
±
1V.
The receiver threshold is less than
±
100 mV over a
±
1V
common mode range and translates the differential Bus
LVDS to standard (TTL/CMOS) levels.
This device is compliant with IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture with the incor-
poration of the defined boundary-scan test logic and test
access port consisting of Test Data Input (TDI), Test Data
Out (TDO), Test Mode Select (TMS), Test Clock (TCK), and
the optional Test Reset (TRST).
Features
n
IEEE 1149.1 (JTAG) Compliant
n
Bus LVDS Signaling
n
Low power CMOS design
n
High Signaling Rate Capability (above 100 Mbps)
n
0.1V to 2.3V Common Mode Range for V
ID
= 200mV
n
±
100 mV Receiver Sensitivity
n
Supports open and terminated failsafe on port pins
n
3.3V operation
n
Glitch free power up/down (Driver & Receiver disabled)
n
Light Bus Loading (5 pF typical) per Bus LVDS load
n
Designed for Double Termination Applications
n
Balanced Output Impedance
n
Product offered in 64 pin LQFP package and BGA
package
n
High impedance Bus pins on power off (V
CC
= 0V)
Simplified Functional Diagram
10124201
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
February 2005
S
2005 National Semiconductor Corporation
DS101242
www.national.com
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SCAN92LV090VEH/NOPB | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SCAN92LV090VEHX | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SCAN92LV090VEHX/NOPB | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SCANH162512SM | 功能描述:IC UNIV BUS TXRX 16BIT 64FBGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - 通用總線函數(shù) 系列:SCAN 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標準包裝:1,500 系列:74AVC 邏輯類型:通用總線驅(qū)動器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應商設備封裝:56-TSSOP 包裝:帶卷 (TR) |
| SCANH162512VA WAF | 制造商:Texas Instruments 功能描述: |
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