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參數(shù)資料
| 型號(hào)： | SCAN18373T |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Transparent Latch with TRI-STATE Outputs(帶三態(tài)輸出的透明鎖存器) |
| 中文描述： | 透明鎖存器與三態(tài)輸出（帶三態(tài)輸出的透明鎖存器） |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大?。?/td> | 170K |
| 代理商： | SCAN18373T |
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SCAN18373T
Transparent Latch with TRI-STATE
Outputs
General Description
The SCAN18373T is a high speed, low-power transparent
latch featuring separate data inputs organized into dual 9-bit
bytes with byte-oriented latch enable and output enable con-
trol signals. This device is compliant with IEEE 1149.1 Stan-
dard Test Access Port and Boundary Scan Architecture with
the incorporation of the defined boundary-scan test logic and
test access port consisting of Test Data Input (TDI), Test
Data Out (TDO), Test Mode Select (TMS), and Test Clock
(TCK).
Features
n
IEEE 1149.1 (JTAG) Compliant
n
Buffered active-low latch enable
n
TRI-STATE outputs for bus-oriented applications
n
9-bit data busses for parity applications
n
Reduced-swing outputs source 24 mA/sink 48 mA
n
Guaranteed to drive 50
transmission line to TTL input
levels of 0.8V and 2.0V
n
TTL compatible inputs
n
25 mil pitch Cerpack packaging
n
Includes CLAMP and HIGHZ instructions
n
Standard Microcircuit Drawing (SMD) 5962-9311801
Connection Diagram
Pin Names
AI
(0–8)
, BI
(0–8)
ALE, BLE
AOE
1
, BOE
1
AO
(0–8)
, BO
(0–8)
Description
Data Inputs
Latch Enable Inputs
TRI-STATE Output Enable Inputs
TRI-STATE Latch Outputs
Truth Tables
Inputs
AOE
1
H
L
L
L
AO (0–8)
ALE
X
H
H
L
AI (0–8)
X
L
H
X
Z
L
H
AO
0
Inputs
BOE
1
H
L
L
L
BO (0–8)
BLE
X
H
H
L
BI (0–8)
X
L
H
X
Z
L
H
BO
0
H= HIGH Voltage Level
L= LOW Voltage Level
X= Immaterial
Z= High Impedance
AO
0
= Previous AO before H-to-L transition of ALE
BO
0
= Previous BO before H-to-L transition of BLE
Functional Description
The SCAN18373T consists of two sets of nine D-type
latches with TRI-STATE standard outputs. When the Latch
Enable (ALE or BLE) input is HIGH, data on the inputs
(AI
or BI
) enters the latches. In this condition the
latches are transparent, i.e., a latch output will change state
each time its input changes. When Latch Enable is LOW, the
latches store the information that was present on the inputs
a set-up time preceding the HIGH-to-LOW transition of the
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
DS100321-1
September 1998
S
1998 National Semiconductor Corporation
DS100321
www.national.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SCAN18373TFMQB WAF | 制造商:Texas Instruments 功能描述: |
| SCAN18373TSSC | 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SCAN18373TSSCX | 功能描述:閉鎖 Transparent Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SCAN18374_YDC3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| SCAN18374T | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:D Flip-Flop with TRI-STATE Outputs |
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